Hi, I am confused about the way iocache works. I saw the previous explanation : *
On Nov 7, 2008, at 7:28 PM, Steve Reinhardt wrote:
Yes, the whole reason for having an IO cache is to make device
accesses work in coherent space. An IO cache isn't the only solution
but it's the only one we have in m5. You might be able to get away
with doing a broadcast invalidate on full-block DMA writes, but
partial-block DMA writes require getting an exclusive copy of the
block and then merging in the DMA data.*
However, I want to do some change to the last level cache like increasing the block size, while I still send requests of system.cache_line_size. So essentially, I am just faking a bigger block size. Does it mean I need to config iocache the same as my last level cache? How does the coherence between iocache and LLC work? Currently, I am working under classical memory system. Do you have any advice if I don't want to use iocache? Are there alternatives?
Thanks!
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