Hi all,
I want to use CommMonitor to collect memory trace. I put the
CommMonitor between the membus and physmem. The configuration file of
CommMonitor is as follows:
self.mem_monitor = CommMonitor(trace_file="mem_comm.trace")
self.membus.master = self.mem_monitor.slave
self.mem_monitor.master = self.physmem.port
However, I found two problems according to the memory access trace shown
below.
dram access: ReadExReq,253755488
comm access: ReadExReq,253755488
dram access: WriteReq,253883392
comm access: WriteResp,253883392
The first problem is that it seems that the DRAM (Physmem) module is
executed earlier than the CommMonitor module.
The second problem is that the write requests received by CommMonitor are
WriteResp requests whereas the requests received by DRAM module are WriteReq
requests.
So are there any ideas about the problem?
Thanks.
Best regards,
Yongbing Huang
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