Andreas, Thanks for the help. It worked. I am able to generate the trace-file. Any idea how to decode the generated trace?
Regards, Aditya On Wed, Jan 22, 2014 at 2:58 AM, Andreas Hansson <[email protected]>wrote: > Hi Aditya, > > I suspect you are connecting a CommMonitor between the tol2bus and > membus in parallel with the L2 cache. You need to use it as a kind of > extension cord. The monitor exposes all addresses from its slave port to > the master port, so you have effectively bypassed the L2. Instead, connect > it in series with the L2 (before or after depending on what you want to do). > > Good luck. > > Andreas > > From: Aditya Deshpande <[email protected]> > Date: Tuesday, 21 January 2014 18:45 > To: Andreas Hansson <[email protected]>, "[email protected]" < > [email protected]> > Subject: Re: [gem5-users] CommMonitor Help > > Andreas, > > I am using se.py file for configuration. > I have added following lines in /configs/common/CacheConfig.py > > system.monitor2 = CommMonitor(trace_file="cachetrace.txt") > system.monitor2.master = system.tol2bus.slave > system.monitor2.slave = system.membus.master > > When I run any code with these lines, it results in "error: > The log for execution is attached: > -- > oneloa 303% ./build/X86_MESI_Two_Level/gem5.opt -v -d > /nfs/data-nas1/adeshpan/gem5 --debug-start=1 --debug-file=comm1.txt.gz > --debug-flags=Cache,CommMonitor --stats-file=comm1stats.txt > configs/example/se.py --caches --cpu-type=TimingSimpleCPU --num-cpus=1 > --l1d_size=32kB --l2cache --l2_size=512kB -c > tests/test-progs/hello/bin/x86/linux/hello > gem5 Simulator System. http://gem5.org > gem5 is copyrighted software; use the --copyright option for details. > > gem5 compiled Jan 13 2014 14:42:07 > gem5 started Jan 21 2014 10:39:22 > gem5 executing on oneloa.isi.edu > command line: ./build/X86_MESI_Two_Level/gem5.opt -v -d > /nfs/data-nas1/adeshpan/gem5 --debug-start=1 --debug-file=comm1.txt.gz > --debug-flags=Cache,CommMonitor --stats-file=comm1stats.txt > configs/example/se.py --caches --cpu-type=TimingSimpleCPU --num-cpus=1 > --l1d_size=32kB --l2cache --l2_size=512kB -c > tests/test-progs/hello/bin/x86/linux/hello > /nfs/div1/adeshpan/arch/gem5/configs/common/CacheConfig.py:49: > SyntaxWarning: import * only allowed at module level > def config_cache(options, system): > Global frequency set at 1000000000000 ticks per second > fatal: system.membus has two ports with same range: > system.mem_ctrls.port > system.monitor2-slave > @ cycle 0 > [recvRangeChange:build/X86_MESI_Two_Level/mem/bus.cc, line 421] > Memory Usage: 771960 KBytes > --- > > Let me know what else I can try. > Thanks for your help. > > Regards, > Aditya > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 >
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