I'm trying to add a new pseudo inst to the X86 arch and running in simple
timing mode.
I've modified the two_bye_inst.isa and added my own opcode :
0x4: decode IMMEDIATE {
format BasicOperate {
...
0x5f: set_user_TLB({{
PseudoInst::set_user_TLB(xc->tcBase(),Rdi,Rsi);
}});
and implemented the changes in src/sim/pseudo_inst.[cc/hh]
the issue is that the new pseudo inst should change the memory and as I've
seen in the cpu/simple/timing,cc it should have a CompleteAcc method in
addition to the execute that its automatically created by python scripts
where do i add the completeAcc and how do i configure the automatic build
scripts that this new inst has something to do with memory and to create
the completeAcc automatically (similar to the completeAcc defined and
implemented in src/arch/x86/isa/microops/ldstop.isa)
Thanks a lot,
Hanna
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