Hello,
I am working on a Ruby cache coherence protocol but I am encountering some
problems that I need to solve. My current problem is that the inter-cache
network doesn't process messages from different virtual networks in order.
An example of my problem is this: a L2 cache controller sends a message to a L1
cache controller on a certain cycle; the next cycle the same L2 cache
controller sends another message to the same L1 cache controller but on a
different vnet. It is important that the first message reaches the L1
controller before the second message reaches in order for the system to work,
but in the simulation, the second message reaches the L2 cache controller
first.
I am wondering if there is anyway I can modify my cache controller or the
network to insure that the first message is received by the L1 cache before the
second message is received.
Best regards,
Alex
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