In most CPUs the i-cache is read only. Nothing should be explicitly written to the i-cache, it will be populated when a fetch req misses, causing a line fill. Even in self-modifying code you don't write explicitly to an executable page, you first remove execute permissions and mark it as data.
Anthony Gutierrez http://web.eecs.umich.edu/~atgutier On Sat, Mar 8, 2014 at 9:23 AM, senni sophiane <[email protected]>wrote: > Hi everybody, > > In stats file, I can find "dcache.WriteReq_accesses" corresponding to the > number of write request accesses in D-Cache. However, there is no such > results for I-Cache. As far as I know, a number of writes has to occur to > cache instructions of the application from Main Memory to I-Cache. So, am I > missing something ? Or are there other results in stats file that can > inform us about I-Cache write accesses ? > > Thanks > > -- > Cordialement / Best Regards > > SENNI Sophiane > Ph.D. candidate - Microelectronics > LIRMM - www.lirmm.fr > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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