Hi All, I am looking at TLB translation for ARM O3 CPU.
In src/arch/arm/tlb.cc, function TLB::translateTiming calls translateComplete which will call translateFs/translateSe and get the translation back to fetch stage immediately. It seems that no delay is assumed for TLB hit, or does TLB translation completely overlap with I-Cache access? Is there any way to add TLB access delay in? Thanks. -- Best Regards, Yan Zi _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
