On Apr 21, 2014, at 12:10 PM, Kuk-Hwan Kim <[email protected]> wrote:
> > Dear Gem5 Communities, > > Here is the first few lines of stats.txt. While I am interpretating the > results, I came across several questions as follows. If you can share > knowleged on how to interpret these paraemters or any insight on the > computer architecture which relevant to these parameters, It will greately > help me out. Thank you for your help in advance, > > > 1. > sim_freq 1000000000000 > Is this meaning that I am running 1Thz CPU not 1Ghz? In order to run 1Ghz > core, > should I use --sys-clock=1000000000 flag in the gem5 command?? > > or since system.clk_domain.clock 1000, it supposed to be This is the reference clock all other clocks are based on. It must be faster than the fastest clock in your system. (e.g. a 1ghz cpu) and be able to approximate other clocks that you’re interested (e.g a 333.333MHz clock). A 1THz is a good balance between maximum simulation time and expressibility of most clocks. > > 2. > 2-1 Why always sim_ops or host_op_rate always higher than sim_insts or > host_op_insts? > (looks like there is difference due to micro-ops, then what is micro-ops in > gem5 which introduces the dispcrency in numbers between insts and ops) > 2-2 and what are those meaning? > 2-3 why sim_insts/sim_ops can be signicantly higher value than > host_op_rate or sim_ops? > (Does this means one host ops/insts can simulated multiple of > sim_ops/insts? > 1 inst >= 1 op. > 3. > 3-1 how come host_mem_usage is significantly smaller than > system.mem_ctrls.bytes_read::total or > system.mem_ctrls.bytes_written::total?? Does this means that not all the > data transaction in simulator get translated to > host memory transaction? > host memory usage is the amount of memory gem5 is using to simulate, just like host_op_rate is the number of operations/second your computer is able to simulate. > 4. when I divide bytes_read::realview.clcd, cpu.dtb.walker, cpu.itb.walker, > cpu.inst, cpu.data by > num_reads::realview.clcd, cpu.dtb.walker, cpu.itb.walker, cpu.inst, > cpu.data are 8byte, 64byte, 64byte, 64byte, 27.037byte, respetively. > -> Does these exact integer form clcd bus size and cache line size? then, > why bytes_read::cpu.data/num_read:cpu.data isn't integer form? the clcd controller is reading 8 bytes at a time, the cpu operates on cache lines, so it reads 64 bytes, and some of whatever benchmark you’re running results in cache hits, so that is why all reads don’t go to memory. > > 5. When I looked at the bandwidth of realview.clcd, cpu.dtb.walker, > cpu.itb.walker, cpu.inst, cpu.data is about <200MB/sec. > What is limiting factor which results in seemingly significant lower > performance when we consider all these bus are on-chip bus. > Is this performance limited by spare read request so that its full memory > bandwidth isn't fully utilized? This add depends on what benchmark you’re running and how many cache hits you get. > > 6. > system.clk_domain.clock = 1000 # clock period in ticks while > system.cpu_clk_domain.clock = 500 # Clock period in ticks > what is these two differnet statement but similar imply? > ? > 7. In regards to membus > system.cf0.dma_read_full_pages, bytes, txs are all zeros. Why there is no > DMA access issued between disk and main memory? is this > because I didn't set configuraiton file properly? If so, which file shoudl > i take a look at ? If you’re using the cf device, it doesn’t support DMA. So all accesses are PIO. > > ========================= Except from stats.txt ====================== > > sim_seconds 11.984008 > # Number of seconds simulated > sim_ticks > 11984008127500 # Number of ticks simulated > final_tick > 21526428618000 # Number of ticks from beginning of > simulation (restored from checkpoints and never reset) > sim_freq > 1000000000000 # Frequency of simulated ticks > host_inst_rate 3782675 > # Simulator instruction rate (inst/s) > host_op_rate 4683852 > # Simulator op (including micro ops) rate (op/s) > host_tick_rate 3275899922 > # Simulator tick rate (ticks/s) > host_mem_usage 531428 > # Number of bytes of host memory used > host_seconds 3658.23 > # Real time elapsed on the host > sim_insts 13837909967 > # Number of instructions simulated > sim_ops 17134626065 > # Number of ops (including micro ops) simulated > system.voltage_domain.voltage 1 > # Voltage in Volts > system.clk_domain.clock 1000 > # Clock period in ticks > system.mem_ctrls.bytes_read::realview.clcd > 575232000 # Number of bytes read from this memory > system.mem_ctrls.bytes_read::cpu.dtb.walker > 15130432 # Number of bytes read from this memory > system.mem_ctrls.bytes_read::cpu.itb.walker > 2436736 # Number of bytes read from this memory > system.mem_ctrls.bytes_read::cpu.inst 121968896 > # Number of bytes read from this memory > system.mem_ctrls.bytes_read::cpu.data 1500576028 > # Number of bytes read from this memory > system.mem_ctrls.bytes_read::total 2215344092 > # Number of bytes read from this memory > system.mem_ctrls.bytes_inst_read::cpu.inst > 121968896 # Number of instructions bytes read from > this memory > system.mem_ctrls.bytes_inst_read::total 121968896 > # Number of instructions bytes read from this memory > system.mem_ctrls.bytes_written::writebacks > 606101568 # Number of bytes written to this memory > system.mem_ctrls.bytes_written::cpu.data 179348570 > # Number of bytes written to this memory > system.mem_ctrls.bytes_written::total 785450138 > # Number of bytes written to this memory > system.mem_ctrls.num_reads::realview.clcd > 71904000 # Number of read requests responded to by > this memory > system.mem_ctrls.num_reads::cpu.dtb.walker > 236413 # Number of read requests responded to by this > memory > system.mem_ctrls.num_reads::cpu.itb.walker > 38074 # Number of read requests responded to by this > memory > system.mem_ctrls.num_reads::cpu.inst 1905764 > # Number of read requests responded to by this memory > system.mem_ctrls.num_reads::cpu.data 55499398 > # Number of read requests responded to by this memory > system.mem_ctrls.num_reads::total 129583649 > # Number of read requests responded to by this memory > system.mem_ctrls.num_writes::writebacks 9470337 > # Number of write requests responded to by this memory > system.mem_ctrls.num_writes::cpu.data 84315511 > # Number of write requests responded to by this memory > system.mem_ctrls.num_writes::total 93785848 > # Number of write requests responded to by this memory > system.mem_ctrls.bw_read::realview.clcd 47999967 > # Total read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_read::cpu.dtb.walker 1262552 > # Total read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_read::cpu.itb.walker 203332 > # Total read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_read::cpu.inst 10177638 > # Total read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_read::cpu.data 125214871 > # Total read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_read::total 184858360 > # Total read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_inst_read::cpu.inst 10177638 > # Instruction read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_inst_read::total 10177638 > # Instruction read bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_write::writebacks 50575864 > # Write bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_write::cpu.data 14965658 > # Write bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_write::total 65541522 > # Write bandwidth from this memory (bytes/s) > system.mem_ctrls.bw_total::writebacks 50575864 > # Total bandwidth to/from this memory (bytes/s) > system.mem_ctrls.bw_total::realview.clcd 47999967 > # Total bandwidth to/from this memory (bytes/s) > system.mem_ctrls.bw_total::cpu.dtb.walker > 1262552 # Total bandwidth to/from this memory > (bytes/s) > system.mem_ctrls.bw_total::cpu.itb.walker > 203332 # Total bandwidth to/from this memory (bytes/s) > system.mem_ctrls.bw_total::cpu.inst 10177638 > # Total bandwidth to/from this memory (bytes/s) > system.mem_ctrls.bw_total::cpu.data 140180529 > # Total bandwidth to/from this memory (bytes/s) > system.mem_ctrls.bw_total::total 250399883 > # Total bandwidth to/from this memory (bytes/s) > system.membus.throughput 272148492 > # Throughput (bytes/s) > system.membus.data_through_bus 3261429746 > # Total data (bytes) > system.membus.snoop_data_through_bus 0 > # Total snoop data (bytes) > system.cpu_voltage_domain.voltage 1 > # Voltage in Volts > system.cpu_clk_domain.clock 500 > # Clock period in ticks > system.cf0.dma_read_full_pages 0 > # Number of full page size DMA reads (not PRD). > system.cf0.dma_read_bytes 0 > # Number of bytes transfered via DMA reads (not PRD). > system.cf0.dma_read_txs 0 > # Number of DMA read transactions (not PRD). > system.cf0.dma_write_full_pages 0 > # Number of full page size DMA writes. > system.cf0.dma_write_bytes 0 > # Number of bytes transfered via DMA writes. > system.cf0.dma_write_txs 0 > # Number of DMA write transactions. > system.cf2.dma_read_full_pages 0 > # Number of full page size DMA reads (not PRD). > system.cf2.dma_read_bytes 0 > # Number of bytes transfered via DMA reads (not PRD). > system.cf2.dma_read_txs 0 > # Number of DMA read transactions (not PRD). > system.cf2.dma_write_full_pages 0 > # Number of full page size DMA writes. > system.cf2.dma_write_bytes 0 > # Number of bytes transfered via DMA writes. > system.cf2.dma_write_txs 0 > # Number of DMA write transactions. > > Thanks, > > Regards > Kuk-Hwan > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
