Thanks Andreas for these useful information.
I will try with the instructions in the description.

Cordialement / Best Regards

SENNI Sophiane
Ph.D. candidate - Microelectronics
LIRMM - www.lirmm.fr

Le 15/09/2014 12:42, Andreas Hansson a écrit :
> Hi,
>
> There is already a brief description here:
>
> http://www.gem5.org/General_Memory_System#Tracing_and_traffic_generation
>
> If that doesn't cut it, let me know (and preferably edit the wiki to provide 
> a more extensive description). In essence you have to modify the code where 
> the two ports you want to monitor are tied together. In your case this is 
> probably BaseCPU.py. At this point you instantiate a monitor and connect it 
> like an extension cord, between the two original ports.
>
> You can switch off all the measurements you do not care about, just have a 
> look at the class parameters in src/mem.
>
> Something worth remembering is that the monitor currently is only looking at 
> "normal" requests and responses, and not snoops going in the opposite 
> direction. Thus, if you want to also measure the snoop bandwidth going 
> "upwards" in the memory system the CommMonitor would have to be extended. If 
> you do this please post the patch.
>
> Good luck with the monitoring.
>
> Andreas
>
> ________________________________________
> From: senni sophiane [[email protected]]
> Sent: Monday, September 15, 2014 11:23 AM
> To: Andreas Hansson; gem5 users mailing list
> Subject: Use CommMonitor to capture L1/L2 cache bandwidth
>
> Hi Andreas,
>
> I would like to use the commMonitor to capture/trace the bandwidth for
> cache memory using periodic dumping. I actually never used the
> commMonitor in gem5. Could you point out to me how can I insert a
> CommMonitor, for example between to only capture the bandwidth (for
> instance for L2) in a simple way, please ?
>
> I am using the last version of gem5-stable.
>
> Thanks for your time
>
> --
> Cordialement / Best Regards
>
> SENNI Sophiane
> Ph.D. candidate - Microelectronics
> LIRMM - www.lirmm.fr
>
>
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