No, I haven't. Where can I check the print out if I add a print in the Python code ?
Cordialement / Best Regards SENNI Sophiane Ph.D. candidate - Microelectronics LIRMM - www.lirmm.fr Le 25/09/2014 19:08, Andreas Hansson a écrit : > Hi Sophiane, > > In the Python code where you instantiate and connect the monitor, have you > added a simple print “I was here” or similar? > > Andreas > > On 25/09/2014 15:43, "senni sophiane" <[email protected]> wrote: > >> Hi Andreas, >> >> Even with the arm_detailed cpu, the monitor was not instantiated in >> config.dot.pdf. >> This time, I ran a simple hello_world application. I can see in >> system.terminal it executed well. >> The libprotobuf package is also installed. >> >> My command line was : >> >> build/ARM/gem5.opt configs/example/fs.py >> --kernel=/dist/m5/system/binaries/vmlinux-3.3-arm-vexpress-emm-pcie >> --machine-type=VExpress_EMM --cpu-type=arm_detailed --caches --l2cache >> -b hello_cpu >> >> Have you an idea on what can be the problem ? Maybe am I missing >> something ? >> >> Thanks >> >> Cordialement / Best Regards >> >> SENNI Sophiane >> Ph.D. candidate - Microelectronics >> LIRMM - www.lirmm.fr >> >> Le 23/09/2014 16:23, senni sophiane a écrit : >>> I looked in config.dot.pdf to check if the monitor was instanciated. >>> I will try with O3 detailed cpu. >>> >>> Cordialement / Best Regards >>> >>> SENNI Sophiane >>> Ph.D. candidate - Microelectronics >>> LIRMM - www.lirmm.fr >>> >>> Le 23/09/2014 15:42, Andreas Hansson a écrit : >>>> Hi Sophiane, >>>> >>>> First, is this portion of code executed? Perhaps add a print or >>>> similar to >>>> make sure you¹ve edited the right portion of the file. >>>> >>>> Second, how did you check if the monitor is instantiated or not? >>>> >>>> As a side note, you should probably not use the timing CPU for anything >>>> besides debugging, rather use Minor or the O3 arm_detailed config. >>>> >>>> Andreas >>>> >>>> On 23/09/2014 14:33, "senni sophiane" <[email protected]> wrote: >>>> >>>>> Hi Andreas, >>>>> >>>>> I modified the file named "BaseCPU.py" as following to instantiate a >>>>> commMonitor between toL2Bus and L2cache : >>>>> >>>>> #self.toL2Bus.master = self.l2cache.cpu_side >>>>> self.L2monitor = CommMonitor(trace_file = "L2trace.tr") >>>>> self.toL2Bus.master = self.L2monitor.slave >>>>> self.L2monitor.master = self.l2cache.cpu_side >>>>> >>>>> I rebuilt with the scons build/ARM/gem5.opt command. >>>>> >>>>> But now when I am running a simulation, I can see the commMonitor is >>>>> not >>>>> instantiated. Am I missing something ? >>>>> >>>>> This is the command line I used : >>>>> >>>>> build/ARM/gem5.opt configs/example/fs.py -r 1 --restore-with-cpu >>>>> timing >>>>> --cpu-type=timing --caches --l2cache --machine-type=VExpress_EMM >>>>> --kernel=/dist/m5/system/binaries/vmlinux-3.3-arm-vexpress-emm-pcie -b >>>>> splash2_fmm >>>>> >>>>> Thanks for your help. >>>>> >>>>> Cordialement / Best Regards >>>>> >>>>> SENNI Sophiane >>>>> Ph.D. candidate - Microelectronics >>>>> LIRMM - www.lirmm.fr >>>>> >>>>> Le 15/09/2014 14:53, senni sophiane a écrit : >>>>>> Thanks Andreas for these useful information. >>>>>> I will try with the instructions in the description. >>>>>> >>>>>> Cordialement / Best Regards >>>>>> >>>>>> SENNI Sophiane >>>>>> Ph.D. candidate - Microelectronics >>>>>> LIRMM - www.lirmm.fr >>>>>> >>>>>> Le 15/09/2014 12:42, Andreas Hansson a écrit : >>>>>>> Hi, >>>>>>> >>>>>>> There is already a brief description here: >>>>>>> >>>>>>> >>>>>>> >>>>>>> http://www.gem5.org/General_Memory_System#Tracing_and_traffic_generat >>>>>>> ion >>>>>>> >>>>>>> If that doesn't cut it, let me know (and preferably edit the wiki to >>>>>>> provide a more extensive description). In essence you have to modify >>>>>>> the code where the two ports you want to monitor are tied together. >>>>>>> In >>>>>>> your case this is probably BaseCPU.py. At this point you >>>>>>> instantiate a >>>>>>> monitor and connect it like an extension cord, between the two >>>>>>> original >>>>>>> ports. >>>>>>> >>>>>>> You can switch off all the measurements you do not care about, just >>>>>>> have a look at the class parameters in src/mem. >>>>>>> >>>>>>> Something worth remembering is that the monitor currently is only >>>>>>> looking at "normal" requests and responses, and not snoops going in >>>>>>> the >>>>>>> opposite direction. Thus, if you want to also measure the snoop >>>>>>> bandwidth going "upwards" in the memory system the CommMonitor would >>>>>>> have to be extended. If you do this please post the patch. >>>>>>> >>>>>>> Good luck with the monitoring. >>>>>>> >>>>>>> Andreas >>>>>>> >>>>>>> ________________________________________ >>>>>>> From: senni sophiane [[email protected]] >>>>>>> Sent: Monday, September 15, 2014 11:23 AM >>>>>>> To: Andreas Hansson; gem5 users mailing list >>>>>>> Subject: Use CommMonitor to capture L1/L2 cache bandwidth >>>>>>> >>>>>>> Hi Andreas, >>>>>>> >>>>>>> I would like to use the commMonitor to capture/trace the bandwidth >>>>>>> for >>>>>>> cache memory using periodic dumping. I actually never used the >>>>>>> commMonitor in gem5. Could you point out to me how can I insert a >>>>>>> CommMonitor, for example between to only capture the bandwidth (for >>>>>>> instance for L2) in a simple way, please ? >>>>>>> >>>>>>> I am using the last version of gem5-stable. >>>>>>> >>>>>>> Thanks for your time >>>>>>> >>>>>>> -- >>>>>>> Cordialement / Best Regards >>>>>>> >>>>>>> SENNI Sophiane >>>>>>> Ph.D. candidate - Microelectronics >>>>>>> LIRMM - www.lirmm.fr >>>>>>> >>>>>>> >>>>>>> -- IMPORTANT NOTICE: The contents of this email and any attachments >>>>>>> are confidential and may also be privileged. If you are not the >>>>>>> intended recipient, please notify the sender immediately and do not >>>>>>> disclose the contents to any other person, use it for any purpose, >>>>>>> or >>>>>>> store or copy the information in any medium. Thank you. >>>>>>> >>>>>>> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >>>>>>> Registered in England & Wales, Company No: 2557590 >>>>>>> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 >>>>>>> 9NJ, Registered in England & Wales, Company No: 2548782 >>>>>>> >>>> -- IMPORTANT NOTICE: The contents of this email and any attachments >>>> are confidential and may also be privileged. If you are not the >>>> intended recipient, please notify the sender immediately and do not >>>> disclose the contents to any other person, use it for any purpose, or >>>> store or copy the information in any medium. Thank you. >>>> >>>> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >>>> Registered in England & Wales, Company No: 2557590 >>>> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 >>>> 9NJ, Registered in England & Wales, Company No: 2548782 >>>> >> > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 > _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
