Hi Andreas,

iMHO, There are a couple of cases where it may not be required to invalidate 
line in lower levels

1. Inclusive caches: I would assume that the lower level inclusive caches 
should , by definition of inclusiveness, hold all the lines a higher level 
cache has. 

2. Shared last level cache: the last level cache (the cache just ahead of main 
memory) may choose to not invalidate the line on a upgradereq. Rational: as 
long as exclusivity is maintained by private cache in earlier level, share LLC 
is strictly not required to invalidate the line on upgradereq. 

Kindly correct me if implicit assumptions I am making is distorting the 
reasoning:)

Thanks and regards 
Nizam


Sent from my iPad

> On 04-Jan-2015, at 6:15 pm, Andreas Hansson <[email protected]> wrote:
> 
> Hi Nizam,
> 
> What do you suggest the lower-level cache should do? The UpgradeReq is 
> ultimately there to ensure that a cache can get a line in exclusive state (E) 
> to perform a write (M).
> 
> Andreas
> 
> From: Nizamudheen Ahmed via gem5-users <[email protected]>
> Reply-To: Nizamudheen Ahmed <[email protected]>, gem5 users mailing list 
> <[email protected]>
> Date: Sunday, 4 January 2015 08:47
> To: gem5 users mailing list <[email protected]>
> Subject: [gem5-users] UpgradeReq command and impact on next-level cache
> 
> Hi,
> 
> I am using classic memory-model in GEM5. I observed that an UpgradeReq 
> command invalidates the line in cache. This behavior is acceptable for 
> peer-caches in the same-level. However, i am not sure if the UpgradeReq 
> should invalidate the cache line in the lower level caches (Caches closer to 
> the main-memory are lower levels, in my terminology). Can someone through 
> light on this? 
> 
> BR/Nizam
> 
> 
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