Maybe the problem is the use of Atomic CPU.

I'll try to use Timing one, and post the results soon.

Thanks.
Matheus

2015-03-25 21:38 GMT-03:00 Matheus Alcântara Souza <[email protected]>:

> Hi Andreas,
>
> The workloads are the same. I am using the Parsec stuff, by the way.
>
> The number of instructions (sim_ticks) are also the same.
>
> I'm using the default CPU (I guess it is atomic), no O3.
>
> I did not change the latency for the different cache sizes. But the
> question is if the cache miss rate should affect the time (more misses -
> small caches - means more time, right?). If I increase the latency of
> bigger caches, the behavior probably will be "more time spent with bigger
> caches", the opposite.
>
> Sorry if the text is confuse.
>
> Than you!
> Em 25/03/2015 20:41, "Andreas Hansson" <[email protected]> escreveu:
>
>>  Hi Matheus,
>>
>>  Are you dumping stats (or exiting) after some specific number of
>> instructions (I.e. are you doing the same amount of work)? Also, if you are
>> using the default o3 configuration it is very aggressive, so perhaps the
>> latency can be hidden?
>>
>>  Andreas
>>
>>   From: Matheus Alcântara Souza <[email protected]>
>> Reply-To: gem5 users mailing list <[email protected]>
>> Date: Wednesday, 25 March 2015 23:26
>> To: gem5 users mailing list <[email protected]>
>> Subject: [gem5-users] Miss rate douby
>>
>>  Hi all,
>>
>>  Consider two gem5 simulation enviroments, one with an l2 cache of size
>> 2048kB, and the other with the same parameters, but a smaller l2 cache of
>> 256kB.
>>
>>  I used X86 with fs.py, with Classic Memory System (no Ruby). The
>> results showed an increase in l2 overall miss rate, if the cache is
>> smaller. But the sim_seconds remains the same.
>>
>>  Is it normal? Anyone have suggestions about what to check?
>>
>>  Best,
>> Matheus Alcântara Souza
>>
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-- 

Atenciosamente,
Matheus Alcântara Souza
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