Hi Andreas, It really helped. Thank you again.
Matheus 2015-03-26 11:34 GMT-03:00 Andreas Hansson <[email protected]>: > Hi Matheus, > > I would think even with the atomic CPU you should see some form of stats > change when you change the cache size. That said, the atomic CPU should > never be used for any time-related performance studies. The notion of time > is very abstract, and it is intended for fast-forwarding and warming (and > development of functionality) only. Even the timing CPU is questionable in > this regard. If you are doing any performance studies you are better off > using the MinorCPU or the O3CPU with suitable configuration options. > > Hope that helps. > > Andreas > > From: Matheus Alcântara Souza <[email protected]> > Date: Thursday, 26 March 2015 14:24 > To: gem5 users mailing list <[email protected]>, Andreas Hansson < > [email protected]> > Subject: Re: [gem5-users] Miss rate douby > > Maybe the problem is the use of Atomic CPU. > > I'll try to use Timing one, and post the results soon. > > Thanks. > Matheus > > 2015-03-25 21:38 GMT-03:00 Matheus Alcântara Souza <[email protected]>: > >> Hi Andreas, >> >> The workloads are the same. I am using the Parsec stuff, by the way. >> >> The number of instructions (sim_ticks) are also the same. >> >> I'm using the default CPU (I guess it is atomic), no O3. >> >> I did not change the latency for the different cache sizes. But the >> question is if the cache miss rate should affect the time (more misses - >> small caches - means more time, right?). If I increase the latency of >> bigger caches, the behavior probably will be "more time spent with bigger >> caches", the opposite. >> >> Sorry if the text is confuse. >> >> Than you! >> Em 25/03/2015 20:41, "Andreas Hansson" <[email protected]> >> escreveu: >> >>> Hi Matheus, >>> >>> Are you dumping stats (or exiting) after some specific number of >>> instructions (I.e. are you doing the same amount of work)? Also, if you are >>> using the default o3 configuration it is very aggressive, so perhaps the >>> latency can be hidden? >>> >>> Andreas >>> >>> From: Matheus Alcântara Souza <[email protected]> >>> Reply-To: gem5 users mailing list <[email protected]> >>> Date: Wednesday, 25 March 2015 23:26 >>> To: gem5 users mailing list <[email protected]> >>> Subject: [gem5-users] Miss rate douby >>> >>> Hi all, >>> >>> Consider two gem5 simulation enviroments, one with an l2 cache of size >>> 2048kB, and the other with the same parameters, but a smaller l2 cache of >>> 256kB. >>> >>> I used X86 with fs.py, with Classic Memory System (no Ruby). The >>> results showed an increase in l2 overall miss rate, if the cache is >>> smaller. But the sim_seconds remains the same. >>> >>> Is it normal? Anyone have suggestions about what to check? >>> >>> Best, >>> Matheus Alcântara Souza >>> >>> -- IMPORTANT NOTICE: The contents of this email and any attachments are >>> confidential and may also be privileged. If you are not the intended >>> recipient, please notify the sender immediately and do not disclose the >>> contents to any other person, use it for any purpose, or store or copy the >>> information in any medium. Thank you. >>> >>> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >>> Registered in England & Wales, Company No: 2557590 >>> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 >>> 9NJ, Registered in England & Wales, Company No: 2548782 >>> >>> _______________________________________________ >>> gem5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >> > > > -- > > Atenciosamente, > Matheus Alcântara Souza > > -- IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2557590 > ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, > Registered in England & Wales, Company No: 2548782 > -- Atenciosamente, Matheus Alcântara Souza
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