Also how do I confirm if there was a miss in instruction tlb miss or a row buffer mix? Also a detailed cpu is a five stage pipeline but the process doesn't complete in 5 complete cycles. What could be a possible reason for that? Is it also bcoz of misses? On Apr 27, 2015 9:01 AM, "kassan unda" <[email protected]> wrote:
> And yes I am using detailed cpu. > On Apr 27, 2015 8:58 AM, "kassan unda" <[email protected]> wrote: > >> I am running in SE mode. Also I am using gem5.debug. Does this will make >> a difference? >> On Apr 27, 2015 6:10 AM, "Arthur Perais" <[email protected]> wrote: >> >>> Tick 75590 would be around 230 cpu cycles. If you get an instruction >>> TLB miss (assuming you run in FS mode) and/or have to go to main memory to >>> get your instruction then miss in the row buffer (assuming you use the >>> detailed model) this sounds reasonnable to me. >>> >>> Le 27/04/2015 12:54, kassan unda a écrit : >>> >>> Hi all, >>> I am running a X86 detailed cpu >>> I set the clock at 3ghz. That means it takes 333 ticks for each clock >>> cycle. >>> I am running a binary that contains only a single instruction. >>> I printed out the trace for some reason the instruction is fetched at >>> 75591th tick >>> 75591: system.cpu T0 : @_start. 0 : MOV_R_I : limm eax, 0x3c : >>> IntAlu : D=0x000000000000003c >>> >>> I dont understand why it takes so long for it to fetch the instruction. >>> Is this normal? >>> How can I fix this? >>> I will appreciate any help I can get. Thx in advance. >>> *Regards,* >>> *Kassan Unda* >>> >>> *Doctoral Candidate * >>> *Computer Engineering* >>> *Missouri S&T (Formerly University of Missouri Rolla)* >>> *WebPage: http://web.mst.edu/~kutx9 <http://web.mst.edu/%7Ekutx9>* >>> >>> *"Do not go where the path may lead, go instead where there is no >>> path and leave a trail."* Ralph Waldo Emerson >>> >>> >>> >>> _______________________________________________ >>> gem5-users mailing >>> [email protected]http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >>> >>> >>> -- >>> Arthur Perais >>> INRIA Bretagne Atlantique >>> Bâtiment 12E, Bureau E303, Campus de Beaulieu >>> 35042 Rennes, France >>> >>> >>> _______________________________________________ >>> gem5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >>
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