On Apr 27, 2015 8:58 AM, "kassan unda" <[email protected]
<mailto:[email protected]>> wrote:
I am running in SE mode. Also I am using gem5.debug. Does this will make
a difference?
gem5.debug/opt/fast are functionally similar (if the compiler
optimizations are correct, I suppose).
If you are running in SE mode, the TLB miss is handled immediately (at
least for X86), so your latency does not come from there.
Most likely going to memory just costs you 200+ cycles, which is fine.
Look at the files in config/common to see which memory model you are
using and in src/mem to see the actual latencies.
Le 27/04/2015 16:09, kassan unda a écrit :
Also how do I confirm if there was a miss in instruction tlb miss or a
row buffer mix? Also a detailed cpu is a five stage pipeline but the
process doesn't complete in 5 complete cycles. What could be a
possible reason for that? Is it also bcoz of misses?
You can print the trace with --debug-flags=All --debug-file=mytrace.out
arguments to gem5. You can look at what happens there.
Yes, gem5 has 5 stages, but one is called IEW, because it does Issue,
Execute, and Writeback. If I remember the code correctly, in the best
case, it finishes in two cycles (cycle 0 is Issue, cycle 1 is Execute
and Writeback). Then, Commit spends one cycle marking an instruction as
ready before committing it (kind of modelling the cycle of writeback,
but anyway). So you're probably never going to commit an instruction in
less than 7 cycles (someone correct me if I'm wrong).
On Apr 27, 2015 9:01 AM, "kassan unda" <[email protected]
<mailto:[email protected]>> wrote:
And yes I am using detailed cpu.
On Apr 27, 2015 6:10 AM, "Arthur Perais"
<[email protected] <mailto:[email protected]>> wrote:
Tick 75590 would be around 230 cpu cycles. If you get an
instruction TLB miss (assuming you run in FS mode) and/or
have to go to main memory to get your instruction then
miss in the row buffer (assuming you use the detailed
model) this sounds reasonnable to me.
Le 27/04/2015 12:54, kassan unda a écrit :
Hi all,
I am running a X86 detailed cpu
I set the clock at 3ghz. That means it takes 333 ticks
for each clock cycle.
I am running a binary that contains only a single
instruction.
I printed out the trace for some reason the instruction
is fetched at 75591th tick
75591: system.cpu T0 : @_start. 0 : MOV_R_I : limm
eax, 0x3c : IntAlu : D=0x000000000000003c
I dont understand why it takes so long for it to fetch
the instruction.
Is this normal?
How can I fix this?
I will appreciate any help I can get. Thx in advance.
/Regards,/
/Kassan Unda/
/Doctoral Candidate
/
/Computer Engineering/
/Missouri S&T (Formerly University of Missouri Rolla)/
/WebPage: http://web.mst.edu/~kutx9
<http://web.mst.edu/%7Ekutx9>/
/
/
*"Do not go where the path may lead, go instead where
there is no path and leave a trail."* Ralph Waldo
Emerson
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INRIA Bretagne Atlantique
Bâtiment 12E, Bureau E303, Campus de Beaulieu
35042 Rennes, France
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