Hi Felipe,
I'm gonna assume that you run O3CPU or Minor. Changing cache size
changes timing. Changing timing may change the number of loads that get
their data from the Store Queue (hence don't access the cache).
If you run atomic or timing, however, I'm not exactly sure how to
explain it.
Arthur.
Le 08/04/2016 18:12, Felipe de Azevedo Piovezan a écrit :
Hi all,
One quick question about gem5:
How come when we run a program twice but with different cache sizes
(say 2KB and 4KB) we get a different number of total accesses (on both
caches)?
This should be a property of the program and it should also be
independent of the architecture used.
Thanks
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Felipe
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Arthur Perais
INRIA Bretagne Atlantique
Bâtiment 12E, Bureau E303, Campus de Beaulieu
35042 Rennes, France
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