Hello,

Did you try to disassemble your binary under simulation and grep the
addresses to check if they're there? I'd say that 0xXXXX is from the user
program. Longer addresses should be from the kernel (considering my
experience with gem5/ARM).

@(function name) could be from any piece of program that didn't have the
function boundary info stripped off, although I have no idea why this
happens.

Regards,

--
Fernando A. Endo, Post-doc

INRIA Rennes-Bretagne Atlantique
France


2016-11-24 10:54 GMT+01:00 mengyu liang <[email protected]>:

> Hello Everyone,
>
> I'm now studying the memory access behavior from exec debug file, using
> the FS simulation with Parsec Benchmarks under alpha multicore system. Acc.
> to instruction address the execution instructions can be categorized into
> following three groups in my opinion:
>
>
> 1. Instruction address with format 0xXXXXXXXXX:
>
> 2333418779000: system.cpu02 T0 : 0x120028e14    : ldq
> r2,64(r30)      : MemRead :  D=0x0000000000000000 A=0x11f9af8c0
> 2333418781000: system.cpu02 T0 : 0x120028e1c    : ldq
> r3,18446744073709519272(r29) : MemRead :  D=0x00000001200af4b0 A=0x1200aea40
> 2333418782000: system.cpu02 T0 : 0x120028e20    : ldq
> r2,0(r3)        : MemRead :  D=0x0000000000000001 A=0x1200af4b0
> 2333418789000: system.cpu02 T0 : 0x120028e3c    : ldq
> r2,64(r30)      : MemRead :  D=0x0000000000000000 A=0x11f9af8c0
> 2333418793000: system.cpu02 T0 : 0x120028e68    : ldq
> r9,0(r11)       : MemRead :  D=0x00000001200b4288 A=0x1200b3ea0
>
>
> 2. Instrucion address with format @(function name):
>
> 2333394654000: system.cpu00 T0 : @ioport_map+20    : ldq
> r27,200(r1)     : MemRead :  D=0xfffffc0000324a50 A=0xfffffc0000860538
> 2333394662000: system.cpu00 T0 : @ioport_map+32    : ldq
> r26,0(r30)      : MemRead :  D=0xfffffc0000319a24 A=0xfffffc0000817aa8
> 2333394667000: system.cpu00 T0 : @outb+40    : ldq        r26,0(r30)
> : MemRead :  D=0xfffffc000053997c A=0xfffffc0000817ab8
> 2333394668000: system.cpu00 T0 : @outb+44    : ldq        r9,8(r30)
> : MemRead :  D=0x0000000000000000 A=0xfffffc0000817ac0
>
>
> 3. Instruction address with format 0xXXXX(only 4 numbers address):
>
> 2333395825000: system.cpu02 T0 : 0x42d1    : hw_ld
> r21,0(r21),PHYS,QUAD : MemRead :  D=0x0000000000000000 A=0x3e448008
> 2333400656000: system.cpu02 T0 : 0x4211    : hw_ld      r8,0(r8),QUAD,VPTE
> : MemRead :  A=0xfffffffe80002000
> 2333400670000: system.cpu02 T0 : 0x42b5    : hw_ld
> r21,0(r21),PHYS,QUAD : MemRead :  D=0x0001f22400063301 A=0x3e16a800
> 2333400677000: system.cpu02 T0 : 0x42d1    : hw_ld
> r21,0(r21),PHYS,QUAD : MemRead :  D=0x0001f1c100063301 A=0x3e448008
>
>
> I think the first group should refer to program instructions. The 2nd
> group should come from OS system call (system function) such as interrupt
> routine.
>
> For the 3rd group, however, I have no idea. Where do those instructions
> come from? The instruction address is much shorter than that of 1st group.
> Moreover, the instruction command always have a prefix "hw" such as
> "hw_ld". Does it mean hardware load? Anyway I can't find this instruction
> description from the manual book of ALPHA CPU.
>
> Could anybody help me to understand this or maybe there is some reference
> book for me to know more about this?
>
>
>
> Thanks in advance.
>
> Best regards,
>
> Mengyu Liang
>
> _______________________________________________
> gem5-users mailing list
> [email protected]
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to