Hi Zicong, You can find more details here: http://www.gem5.org/Garnet2.0
Note that Garnet1.0 and 2.0 do the same 6 actions: BW, RC, VA, SA, ST, and LT. In Garnet 1.0, the order was: Cycle 1: BW + RC, Cycle 2: VA, Cycle 3: SA, Cycle 4: ST, Cycle 5: LT In Garnet 2.0, the order is: Cycle 1: Router (BW + RC + SA + VS + ST), Cycle 2: LT [Note: In a real design, ST + LT might happen together in Cycle 2]. With regard to your question about VA vs VS. The VS idea has been used in some of these papers: http://projects.csail.mit.edu/wiki/pub/LSPgroup/PublicationList/noc4x4_dac2012.pdf http://projects.csail.mit.edu/wiki/pub/LSPgroup/PublicationList/singlecycle_iccd.pdf The idea is as follows: there is no benefit in having a flit win VA if it loses SA. So a simplified VA is used - where a VC is assigned only to flits that win SA. Every output port maintains a queue of free VCs at the next router. Every head flit that wins SA for the output port is assigned the VCid at the head of the queue. A flit is only allowed to go for SA if the free VC queue at its requested output port is non-empty. I am working on a paper/tech-report on the garnet2.0 microarchitecture. But for now the wiki page is your best resource. Cheers, Tushar On Dec 7, 2016, at 9:20 AM, 王子聪 <wangzic...@nudt.edu.cn<mailto:wangzic...@nudt.edu.cn>> wrote: Dear Tushar, I am a Ph.D. candidate in National University of Defense Technology. I've been doing some network-related experiments based on GEM5 and Garnet, and I appreciated your work very much. I know Garnet1.0(fixed-pipeline) models a classic 5-stage Virtual Channel router. But in Garnet2.0, the router microarchitecture changes to 6 stages: BW/RC/SA/VS/ST/LT. I noticed that VC Selection (VS) is after Switch Allocation (SA) which the order is reversed comparing with the classic 5-stage router. Could you tell me what is the difference between VA (Garnet1.0) and VS (Garnet2.0), and why Garnet2.0 is different from Garnet1.0 on the router pipeline? I've been trying to find some relative papers for understanding the router pipeline of Garnet2.0, and I wonder whether exists such papers introducing the router mircoarchitecture of Garnet2.0 like the paper "GARNET: A detailed on-chip network model inside a full-system simulator" introducing Garnet1.0? Thank you! Best, Zicong -- 发送自nudt邮箱
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