Hi Majid, It looks like you're running into a known issue.
I think this is the patch that fixes it. http://reviews.gem5.org/r/2691/ Cheers, Jason On Tue, Dec 13, 2016 at 5:29 PM Majid Namaki Shoushtari <[email protected]> wrote: > Hi Jason, > > Thanks for the info. > > I wonder if one of those corner cases affects the multithreading support > on SE for x86 with classic memory system? > Note 3 on the status matrix page states that "Classic caches do not > support x86 locked (atomic RMW) accesses." Would that affect for example > how mutexes are handled? > > I've tried running a very simple multithreaded microbenchmark that > stresses the coherence logic. The benchmark works fine when I run it with > arm+classic memory system and with x86+ruby. But with x86+classic memory > system, I see incorrect execution. I'm using the very latest dev branch and > se.py config file to create 4*4 mesh in case of ruby and 16 CPUs with > crossbar in case of classic memory model. > > So, is classic memory system + x86 + multithreading + SE a combination > that is expected to work reliably? > > Thanks, > Majid > > On Tue, Dec 13, 2016 at 7:36 AM, Jason Lowe-Power <[email protected]> > wrote: > > Hi Majid, > > The status matrix is quite out of date. I would take everything it says > with a grain of salt. > > x86 works pretty well in SE mode with any of the CPU models. There are a > few corner cases where there are bugs, but it's good enough that many > people have been using it to publish papers for years. > > Cheers, > Jason > > On Mon, Dec 12, 2016 at 7:30 PM Majid Namaki Shoushtari <[email protected]> > wrote: > > Hi there, > > Since the last time that the "status matrix" page was updated is more than > a year ago, I thought I would ask if it still reflects current status? > > More specifically, I'm interested to know if X86 is supposed to work > reliably with any of the timing CPUs in SE mode. > > Thanks, > Majid > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > -- > > Jason > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > -- > Majid Namaki Shoushtari > PhD Candidate > Department of Computer Science > University of California, Irvine > Irvine, CA 92697 > [email protected] > http://www.ics.uci.edu/~anamakis > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users -- Jason
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