Hi Jason, hi all, I found a way to avoid this. I built two executables of my program: one with the checkpoint at the beginning of the ROI but without m5_exit(0) at the end, and another with both m5 operations. I used the first one to write the checkpoint, and I restarted with the second one. With this mechanism, I did not observed a warning. I used the PseudoInst debug flags to confirm that m5_exit(0) is called correctly.
> Switch at curTick count:10000 > info: Entering event queue @ 2792665962500. Starting simulation... > Switched CPUS @ tick 2792665972500 > switching cpus > **** REAL SIMULATION **** > info: Entering event queue @ 2792665972500. Starting simulation... > 2807654505500: global: PseudoInst::quiesceSkip() > 2807655304000: global: PseudoInst::quiesceSkip() > 2807672441000: global: PseudoInst::quiesceSkip() > 2807693674500: global: PseudoInst::quiesceSkip() > 2807849849500: global: PseudoInst::quiesceSkip() > 2807906797000: global: PseudoInst::quiesceSkip() > 2808111760000: global: PseudoInst::quiesceSkip() > 2808112367000: global: PseudoInst::quiesceSkip() > 2808844719000: global: PseudoInst::m5exit(0) > Exiting @ tick 2808844719000 because m5_exit instruction encountered Maybe I found "why" this is happening.. Below, the warning condition: >> 86 warn_if(serialize && (when != curTick() || repeat), >> 87 "exitSimLoop called with a delay and auto serialization. This >> is " >> 88 "currently unsupported."); As far as I see, when exiting with m5_exit(), exitSimLoop() is always called with serialize=true and repeat=0 [1]. Then, the issue could be when != curTick(). Any thoughts ? [1] http://grok.gem5.org/xref/gem5/src/sim/pseudo_inst.cc#293 On 02/01/2017 05:45 PM, Pierre-Yves Péneau wrote: > Hi Jason, > > I used this command to build my program: > >> arm-linux-gnueabi-gcc-4.9 -static -O3 foo.c util/m5/m5op_arm.S -o foo > > Then, I used this one for creating the checkpoint: > >> ./build/ARM/gem5.fast -d chkpt-dir -e -r configs/example/fs.py --script >> util/rcS/foo.rcS > > And this one for restarting from the checkpoint: > >> ./build/ARM/gem5.fast -d chkpt-dir/timing -e -r configs/example/fs.py >> --script util/rcS/foo.rcS --cpu-type timing --caches --checkpoint-dir >> chkpt-dir -r 1 > > I just rebuilt the executable with m5_exit(0) and tested again, I got > the same warning. Note that this warning is also triggered when I try to > create a checkpoint. > > On 02/01/2017 05:23 PM, Jason Lowe-Power wrote: >> Hi, >> >> What is the command you're using to build the executable? I'm unable to >> reproduce this bug with the following command: >> >> gcc -o hello hello.c util/m5/m5op_x86.o >> >> I also tested for ARM. >> >> It shouldn't be possible to compile without a parameter to m5_exit. Also, >> looking through the code, as long as you specify a delay of 0 everything >> should work. You *will* get the warning if you specify a delay other than >> 0, though. >> >> Cheers, >> Jason >> >> On Wed, Feb 1, 2017 at 4:17 AM Pierre-Yves Péneau < >> [email protected]> wrote: >> >> Hi, >> >> I get a warning [1] when I try to exit my simulation with m5_exit(): >> >>> "warn: exitSimLoop called with a delay and auto serialization. This is >> currently unsupported." >> >> What I am doing is restoring a simulation at the entry of my ROI, then >> executing gem5 in FS mode and exiting at the end. My code looks like this: >> >>> m5_checkpoint(0,0); >>> for (i = 0; i < N; i++) >>> { >>> ... >>> } >>> m5_exit(); >> >> I tried to use m5_exit() with no parameter or zero, the result is the >> same. So, I don't understand why gem5 is complaining about an exit >> delay. And what is auto serialization ? >> >> Thank you. >> >> >> [1] http://grok.gem5.org/source/xref/gem5/src/sim/sim_events.cc#82 >> >> -- >> +-------------------------------------------------------------+ >> | Pierre-Yves Péneau - PhD student | first.last at lirmm.fr | >> | LIRMM / CNRS - SYSMIC team | + 33 4 67 41 86 33 >> <+33%204%2067%2041%2086%2033> | >> | Building 4 Office H2.2 | http://walafc0.org | >> +-------------------------------------------------------------+ >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> >> >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- +-------------------------------------------------------------+ | Pierre-Yves Péneau - PhD student | first.last at lirmm.fr | | LIRMM / CNRS - SYSMIC team | + 33 4 67 41 86 33 | | Building 4 Office H2.2 | http://walafc0.org | +-------------------------------------------------------------+ _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
