Hi All,
I was trying to run a simple system consisting of a CPU, L1 and L2 caches
and HMC as main memory. (Similar to hmctest.py and just replacing traffic
generators by cpu and adding L1 and L2 caches). While running "same"
architecture, where all available memory is accessible by all four serial
links, I am getting the following error:
warn: Cache line size is neither 16, 32, 64 nor 128 bytes.
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
fatal: system.membus has two ports responding within range [0 : 0xffffffff]:
system.hmc_host.seriallink1.slave
system.hmc_host.seriallink0.slave
@ tick 0
[recvRangeChange:build/X86/mem/xbar.cc, line 428]
I tried to re-run simulation without using caches by connecting cpu icache
and dcache ports directly to membus, but error still persists.
Any ideas to fix this issue?
Thanks
Muzamil
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