Hi Muzamil, As Hassan wrote before you would have to generate multiple requests. You have to choose a cache where you will send these requests from. The corresponding responses will install the cache lines in the same cache.
I am afraid that you can't just generate multiple responses in the memory controller. The cache in gem5 will complain if it receives a response without a matching request. Nikos ________________________________ From: gem5-users <[email protected]> on behalf of hassan yamin <[email protected]> Sent: 28 April 2017 19:12:57 To: gem5 users mailing list Subject: Re: [gem5-users] "Bringing multiple Cache-Lines from Main Memory" I think you can do that by generating multiple requests along with the main request to the dram. You can do that in memory controller or the cpu side. Specific details depends upon how many cache lines you require and their addresses. But i think its not that much difficult. See the trace of some high spatial locality benchmark like libquantum, so from the trace you can reverse engineer how to generate consecutive memory addresses. On Apr 29, 2017 3:04 AM, "Muzamil Rafique" <[email protected]<mailto:[email protected]>> wrote: Hi All, When we have a miss in LLC and found that address in row-buffer (row currently open) in main memory, how can we bring multiple cache-lines residing in that row buffer (along with requested one) in to caches? Is there currently any support available in gem5? Thanks Muzamil _______________________________________________ gem5-users mailing list [email protected]<mailto:[email protected]> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
