Hi everyone,

It seems like the default value of srcRegsRelativeLats is 0 for the
multiplier while the operation latency is 3. (
https://github.com/gem5/gem5/blob/master/src/cpu/minor/MinorCPU.py). This
means that an instruction which is dependent on the dest reg of a multiply
instruction can be issued in the very next clock cycle. Is this a bug? How
does this work?

class MinorDefaultIntMulFU(MinorFU):
    opClasses = minorMakeOpClassSet(['IntMult'])
    timings =     [MinorFUTiming(description='Mul', srcRegsRelativeLats=[0])]
    opLat = 3

Thanks,
Nitish

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