[gem5-users] Any recommendation of ARM HPI configuration

[杜东]

Hi guys,
   
    I am using GEM5 ARM with the Minor CPU (specifically, HPI mode).
    The default configuration is :
        Core: 4GHz 
        TLB:  256 entries I/D TLB
        L1 I/D cache:  1 cycle (data/tag/response) 
        L2 I/D cache:  13 cycles for data and tag access
        memory type:   DDR3_1600_8x8.

    This default configuration seems too great? 
    I am not sure whether real devices can achieve the performance, especially 
1 cycle L1 cache access.
    
    So do you have any recommendation on the configurations?
    Any comments are welcomed!

Dong 
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