Thanks for sharing this!
I always use build wrappers that build the boot code for me every time so I don't ever forget. Maybe Scons should do it as well. ________________________________ From: Qureshi Yasir Mahmood <[email protected]> Sent: Thursday, June 27, 2019 11:35:02 AM To: gem5 users mailing list; Ciro Santilli Subject: RE: [gem5-users] ARM 32/64 Core FS Simulation - No BOOTUP Hi Ciro, I am finally able to boot more than 32 cores. The problem was in the boot file I was using, which was quite old. I compiled the boot file under gem5/system/arm/aarch64_bootloader and that fixed the problem. Thank you. Best Regards Yasir -----Original Message----- From: gem5-users [mailto:[email protected]] On Behalf Of Qureshi Yasir Mahmood Sent: 17 May 2019 12:08 To: Ciro Santilli <[email protected]>; gem5 users mailing list <[email protected]> Subject: Re: [gem5-users] ARM 32/64 Core FS Simulation - No BOOTUP Hi Ciro, I still not able to boot (32 cores) with the version you recommended. I also tried to use the auto generated dtb, but that didn't help either. Regards Yasir -----Original Message----- From: Ciro Santilli [mailto:[email protected]] Sent: 15 May 2019 17:51 To: Qureshi Yasir Mahmood <[email protected]>; gem5 users mailing list <[email protected]> Subject: Re: [gem5-users] ARM 32/64 Core FS Simulation - No BOOTUP On 5/14/19 3:06 PM, Qureshi Yasir Mahmood wrote: > Hi All, > > I am trying to do a 32/64 core ARMv8 FS simulation. I have followed > the steps in > https://www.mail-archive.com/[email protected]/msg15475.html > and also enabled the GICv2 extensions fs.py file. The simulation does > not boot-up, and is stalled/hanged-up in the boot process. I am using > kernel 4.15. The command line is as follows > > ./build/ARM/gem5.fast --remote-gdb-port=0 -d test_32_cores > configs/example/fs.py --cpu-clock=1GHz --kernel=vmlinux4_15 > --machine-type=VExpress_GEM5_V1 > --dtb-file=/home/yqureshi/gem5/system/arm/dt/armv8_gem5_v1_32cpu.dtb > -n > 32 --disk-image=test_32.img --caches --l2cache --l1i_size=32kB > --l1d_size=32kB --l2_size=1MB --l2_assoc=2 --mem-type=DDR4_2400_4x16 > --mem-ranks=4 --mem-size=4GB --sys-clock=1600MHz > > Has anyone encountered a similar issue and resolved it? Just to > mention, the simulation works well for up to 16 cores. > Hi Qureshi, I have just successfully booted the gem5 4.15 kernel with gem5 9048ef0ffbf21bedb803b785fb68f83e95c04db8 and command line: build/ARM/gem5.opt \ --debug-file trace.txt \ --listener-mode on \ --outdir out/run/gem5/aarch64/0/m5out \ submodules/gem5/configs/example/fs.py \ --disk-image rootfs.ext2 \ --kernel gem5-v4.15/aarch64/vmlinux \ --mem-size 256MB \ --num-cpus 32 \ --script readfile \ --command-line 'earlyprintk=pl011,0x1c090000 lpj=19988480 rw loglevel=8 mem=256MB root=/dev/sda console_msg_format=syslog nokaslr norandmaps panic=-1 printk.devkmsg=on printk.time=y rw console=ttyAMA0 - lkmc_home=/lkmc' \ --machine-type VExpress_GEM5_V1 \ --param 'system.panic_on_panic = True' \ --param 'system.realview.gic.gem5_extensions = True' \ ; Can you try to diff out the command lines? The most important difference I see is that I'm not passing a DTB, which enables automatic DTB generation, which is more likely to be correct than the manually created one. This had also been recommended at: https://stackoverflow.com/a/50248068/9160762 > Best Regards > > Yasir > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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