Hi Gururaj,
Yes, that was my question. I was reading through this old post on the mail
archive (https://www.mail-archive.com/[email protected]/msg08525.html
<https://www.mail-archive.com/[email protected]/msg08525.html>).
I was trying to see if I could find the modeling for cache miss replay in the
O3 code base, but I was unable to.
Thanks,
Shyam
On Fri, Aug 16, 2019 at 8:04 PM Saileshwar, Gururaj <[email protected]
<mailto:[email protected]>> wrote:
Hi Shyam,
If I understand your question correctly, you are wondering whether it supports
speculative scheduling? Based on my limited understanding of the DerivO3CPU
scheduler, I think the scheduling policy only schedules a instruction once it
knows all its dependencies are ready. I don’t think it speculatively schedules
subsequent instructions dependent on a load, predicting that the load hits in
the cache. More experienced folks may correct me if I am wrong.
Cheers,
Gururaj
From: gem5-users <[email protected]
<mailto:[email protected]>> on behalf of Shyam Murthy
<[email protected] <mailto:[email protected]>>
Reply-To: gem5 users mailing list <[email protected]
<mailto:[email protected]>>
Date: Friday, August 16, 2019 at 4:50 PM
To: gem5 users mailing list <[email protected] <mailto:[email protected]>>
Subject: [gem5-users] Load schedule in O3 CPU
Hi All,
I had a couple of questions about how loads are scheduled in O3 CPU on gem5.
Does the instruction schedule happen for a load expecting a cache hit? Is there
a replay in case of a miss?
I see that code defers memory instructions on a TLB miss. Is there similar code
that handles loads that miss in the cache?
Thanks for the help in advance.
Thanks,
Shyam
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