Hello,
I wonder how the decomposition of macroops in microops were decided for x86 in gem5 (for example, DIV in div1, div2, div2i, br, divq and divr). Are there some resources that helped to know which microops are used in real-world CPU?
Thanks, Anis. -- Anis Peysieux Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E301, Campus de Beaulieu, 35042 Rennes Cedex, France _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
