I am used Gem5 for multithreaded program execution with a two-level cache hierarchy. I need to store metadata at L1 cache and LLC. What will be a good approach: 1. To create a sim object directly in Gem5 and use it in the coherence protocol. OR 2. To define the structure in the SLICC state machine for the protocol.
If any clarification is required, kindly revert to me. Regards, Vipin
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