"Gem5 already includes all key microarchitecture components which model hardware arrays on which faults of any duration and severity can be injected. [1 <https://www.clereco.eu/images/publications/IISWC.2015.28.pdf> ]"
" hardware arrays" ....What does that mean?
_______________________________________________ gem5-users mailing list -- [email protected] To unsubscribe send an email to [email protected] %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
