I believe that's referring to RAM generally (e.g., registers, caches, DRAM, etc.)
Cheers, Jason On Mon, Jan 11, 2021 at 10:23 PM husin alhaj ahmade via gem5-users < gem5-users@gem5.org> wrote: > "Gem5 already includes all key microarchitecture components which model > hardware arrays on which faults of any duration and severity can be > injected. [1 > <https://www.clereco.eu/images/publications/IISWC.2015.28.pdf>]" > > " hardware arrays" ....What does that mean? > > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
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