On 4/12/2023 8:12 AM, 中国石油大学张天 via gem5-users wrote:
So my current understanding is that there is no specific implementation of the ALU in gem5, but some required attributes are set, such as delay, number of functional units, power consumption, etc. So to design the ALU, it doesn't work. The feeling is to regard the functional unit as a black box, no matter what is done in the middle, only define how long it takes to get out of the black box, and how much power is used in the black box, etc. Do you think I understand this right?
Yes. gem5 is a *timing* simulator, but at the functional level, not the circuit level or logic gate level. There are, of course, other simulators that can do that. See this Wikipedia page for some free circuit simulators: https://en.wikipedia.org/wiki/List_of_free_electronics_circuit_simulators and this one for (not necessarily free) HDL simulators: https://en.wikipedia.org/wiki/List_of_HDL_simulators and this one for an overview of electronic design automation software: https://en.wikipedia.org/wiki/Comparison_of_EDA_software You might wish to simulate your own design using FPGA boards as well. I've not used any of these tools myself, but am generally aware of them. Regards - Eliot Moss _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
