Hi Zhang,
That parameter configures the *maximum* (hardware constrained) vector length. It is possible to choose a different (smaller) vector length for a process by configuring the following registers ZCR_EL1 [1] ZCR_EL2 [2] ZCR_EL3 [3] So I believe the problem is that while you are properly setting up the gem5 parameter, those registers have been configured for a smaller vector length. What happens if you change the vector length from the guest? In Linux you can either change /proc/sys/abi/sve_default_vector_length (requires root permission) or use the prctl syscall [4] (from your program) with the PR_SVE_SET_VL flag. Let me know if this works... Kind Regards Giacomo [1]: https://developer.arm.com/documentation/ddi0601/2020-12/AArch64-Registers/ZCR-EL1--SVE-Control-Register--EL1-?lang=en [2]: https://developer.arm.com/documentation/ddi0601/2020-12/AArch64-Registers/ZCR-EL2--SVE-Control-Register--EL2-?lang=en [3]: https://developer.arm.com/documentation/ddi0601/2020-12/AArch64-Registers/ZCR-EL3--SVE-Control-Register--EL3-?lang=en [4]: https://man7.org/linux/man-pages/man2/prctl.2.html On 20/04/2023 09:22, 等价无穷小 via gem5-users wrote: Dear gem5 Community, I hope this email finds you well. I am currently working on a project that involves using ARM SVE in gem5 FS mode, and I have encountered a problem that I would appreciate your help with. While using the ARM SVE in gem5 FS mode, I added the command line parameter "--param 'system.sve_vl = 16'" to specify the vector length. However, when I tried to retrieve the system vector length using the SVE intrinsic svcntb(), the result I obtained was a vector length of 256 bits. This is different from the expected result based on the parameter I set. I am unsure if I have missed any important steps or if there is an issue with my configuration. I would be grateful if you could provide guidance on this matter or point me to any relevant resources or examples that could help me resolve the issue. Thank you in advance for your assistance, and I look forward to your response. Best regards, Zhang Meng ________________________________ <https://wx.mail.qq.com/home/index?t=readmail_businesscard_midpage&nocheck=true&name=%E7%AD%89%E4%BB%B7%E6%97%A0%E7%A9%B7%E5%B0%8F&icon=https%3A%2F%2Fthirdqq.qlogo.cn%2Fg%3Fb%3Doidb%26k%3D5VZd2RcseTmsoyuvL8f5OQ%26s%3D0&mail=zhangm20%40foxmail.com&code=F9338S2XBNHz4P-CDAyLpeRvw5G_OED4O_hCF53fe6pqFWsPSq0QQW3r5ZQIEYUDq4F3jpSLUdEQWv8neI1eHmpd3PWRzDHnbf02RfwYATg> [https://thirdqq.qlogo.cn/g?b=oidb&k=5VZd2RcseTmsoyuvL8f5OQ&s=0] 等价无穷小 zhang...@foxmail.com _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org<mailto:gem5-users@gem5.org> To unsubscribe send an email to gem5-users-le...@gem5.org<mailto:gem5-users-le...@gem5.org> IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
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