Hello all,
I am testing PARSEC benchmarks in FS along with DRAMSim and I get very
few accesses to the memory. Normally I do not have more than 2
petitions waiting to be processed. If I increase the latency of the
memory I still get very few accesses, and the size of the caches I am
using is really small. I consider that this is a problem of my
configuration of the simulator. In my rcS I am trying to execute 4
benchmarks at the same time using the & operator, I have something
like this:
...250k.dat 220 &
...rret/output.txt &
...mate/out.fluid &
...eal/1000.nets
/sbin/m5 exit
The execution of the benchmarks is right all of them finish
successfully. But I do not know if all of them are running at the same
time.
I do not know if using & will work in M5, if this is not the right way
to execute the 4 benchs at the same time. Can anyone please provide a
way to do this in FS?.
Also regarding the few accesses and my configuration, this are some of
the main parameters I have in the FS.py:
L2Cache(size = '8kB', assoc = 4, latency = '7.5ns', block_size = 64,
mshrs = 64 )
SplitL1Caches(L1Cache(size = '4kB', assoc = 2, latency = '0.5ns',
block_size = 64, mshrs = 64 ),
L1Cache(size = '4kB', assoc = 2, latency =
'0.5ns', block_size = 64, mshrs = 64 ))
As you can see those cache are really small. And I think I should get
much more petitions waiting to be processed in DRAMsim. I have tried
different benchmarks but in none of them I get a big amount of
accesses. Does anyone know what am I missing in the configuration?.
Thanks a lot in advance.
And finally if someone need this is my config.ini file:
[root]
type=Root
children=system
dummy=0
[system]
type=LinuxAlphaSystem
children=bridge cpu0 cpu1 cpu2 cpu3 disk0 disk2 intrctrl iobus iocache
l2 membus physmem simple_disk terminal tol2bus tsunami
boot_cpu_frequency=376
boot_osflags=root=/dev/hda1 console=ttyS0
console=/home/m5-fs/binaries/console
init_param=0
kernel=/home/m5-fs/binaries/vmlinux
mem_mode=timing
pal=/home/m5-fs/binaries/ts_osfpal
physmem=system.physmem
readfile=/home/TestsM5/m5-9279812da5ee/configs/boot/MyBench2.rcS
symbolfile=
system_rev=1024
system_type=34
[system.bridge]
type=Bridge
delay=50000
filter_ranges_a=0:18446744073709551615
filter_ranges_b=0:8589934591
nack_delay=4000
req_size_a=16
req_size_b=16
resp_size_a=16
resp_size_b=16
write_ack=false
side_a=system.iobus.port[0]
side_b=system.membus.port[0]
[system.cpu0]
type=TimingSimpleCPU
children=dcache dtb icache interrupts itb tracer
clock=376
cpu_id=0
defer_registration=false
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu0.dtb
function_trace=false
function_trace_start=0
interrupts=system.cpu0.interrupts
itb=system.cpu0.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
profile=0
progress_interval=0
system=system
tracer=system.cpu0.tracer
dcache_port=system.cpu0.dcache.cpu_side
icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu0.dcache_port
mem_side=system.tol2bus.port[2]
[system.cpu0.dtb]
type=AlphaDTB
size=64
[system.cpu0.icache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu0.icache_port
mem_side=system.tol2bus.port[1]
[system.cpu0.interrupts]
type=AlphaInterrupts
[system.cpu0.itb]
type=AlphaITB
size=48
[system.cpu0.tracer]
type=ExeTracer
[system.cpu1]
type=TimingSimpleCPU
children=dcache dtb icache interrupts itb tracer
clock=376
cpu_id=1
defer_registration=false
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu1.dtb
function_trace=false
function_trace_start=0
interrupts=system.cpu1.interrupts
itb=system.cpu1.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
profile=0
progress_interval=0
system=system
tracer=system.cpu1.tracer
dcache_port=system.cpu1.dcache.cpu_side
icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu1.dcache_port
mem_side=system.tol2bus.port[4]
[system.cpu1.dtb]
type=AlphaDTB
size=64
[system.cpu1.icache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu1.icache_port
mem_side=system.tol2bus.port[3]
[system.cpu1.interrupts]
type=AlphaInterrupts
[system.cpu1.itb]
type=AlphaITB
size=48
[system.cpu1.tracer]
type=ExeTracer
[system.cpu2]
type=TimingSimpleCPU
children=dcache dtb icache interrupts itb tracer
clock=376
cpu_id=2
defer_registration=false
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu2.dtb
function_trace=false
function_trace_start=0
interrupts=system.cpu2.interrupts
itb=system.cpu2.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
profile=0
progress_interval=0
system=system
tracer=system.cpu2.tracer
dcache_port=system.cpu2.dcache.cpu_side
icache_port=system.cpu2.icache.cpu_side
[system.cpu2.dcache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu2.dcache_port
mem_side=system.tol2bus.port[6]
[system.cpu2.dtb]
type=AlphaDTB
size=64
[system.cpu2.icache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu2.icache_port
mem_side=system.tol2bus.port[5]
[system.cpu2.interrupts]
type=AlphaInterrupts
[system.cpu2.itb]
type=AlphaITB
size=48
[system.cpu2.tracer]
type=ExeTracer
[system.cpu3]
type=TimingSimpleCPU
children=dcache dtb icache interrupts itb tracer
clock=376
cpu_id=3
defer_registration=false
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu3.dtb
function_trace=false
function_trace_start=0
interrupts=system.cpu3.interrupts
itb=system.cpu3.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
profile=0
progress_interval=0
system=system
tracer=system.cpu3.tracer
dcache_port=system.cpu3.dcache.cpu_side
icache_port=system.cpu3.icache.cpu_side
[system.cpu3.dcache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu3.dcache_port
mem_side=system.tol2bus.port[8]
[system.cpu3.dtb]
type=AlphaDTB
size=64
[system.cpu3.icache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=2
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=5000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=4096
subblock_size=0
tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu3.icache_port
mem_side=system.tol2bus.port[7]
[system.cpu3.interrupts]
type=AlphaInterrupts
[system.cpu3.itb]
type=AlphaITB
size=48
[system.cpu3.tracer]
type=ExeTracer
[system.disk0]
type=IdeDisk
children=image
delay=1000000
driveID=master
image=system.disk0.image
[system.disk0.image]
type=CowDiskImage
children=child
child=system.disk0.image.child
read_only=false
table_size=65536
[system.disk0.image.child]
type=RawDiskImage
image_file=/home/m5-fs/disks/linux-parsec-golden.img
read_only=true
[system.disk2]
type=IdeDisk
children=image
delay=1000000
driveID=master
image=system.disk2.image
[system.disk2.image]
type=CowDiskImage
children=child
child=system.disk2.image.child
read_only=false
table_size=65536
[system.disk2.image.child]
type=RawDiskImage
image_file=/home/m5-fs/disks/linux-bigswap2.img
read_only=true
[system.intrctrl]
type=IntrControl
sys=system
[system.iobus]
type=Bus
SCS_BusType=0
block_size=64
bus_id=0
clock=1000
header_cycles=1
responder_set=true
width=64
default=system.tsunami.pciconfig.pio
port=system.bridge.side_a system.tsunami.cchip.pio
system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio
system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio
system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio
system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio
system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio
system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio
system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio
system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio
system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio
system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio
system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio
system.tsunami.backdoor.pio system.tsunami.ide.pio
system.tsunami.ethernet.pio system.iocache.cpu_side
system.tsunami.ethernet.config system.tsunami.ethernet.dma
system.tsunami.ide.config system.tsunami.ide.dma
[system.iocache]
type=BaseCache
addr_range=0:18446744073709551615
assoc=8
block_size=64
cpu_side_filter_ranges=549755813888:18446744073709551615
hash_delay=1
latency=10000
max_miss_count=0
mem_side_filter_ranges=0:18446744073709551615
mshrs=20
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=100000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=1024
subblock_size=0
tgts_per_mshr=12
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.iobus.port[28]
mem_side=system.membus.port[3]
[system.l2]
type=BaseCache
addr_range=0:18446744073709551615
assoc=4
block_size=64
cpu_side_filter_ranges=
hash_delay=1
latency=7500
max_miss_count=0
mem_side_filter_ranges=
mshrs=64
prefetch_access=false
prefetch_cache_check_push=true
prefetch_data_accesses_only=false
prefetch_degree=1
prefetch_latency=75000
prefetch_miss=false
prefetch_past_page=false
prefetch_policy=none
prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
repl=Null
size=8192
subblock_size=0
tgts_per_mshr=12
trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.tol2bus.port[0]
mem_side=system.membus.port[2]
[system.membus]
type=Bus
children=responder
SCS_BusType=0
block_size=64
bus_id=1
clock=1000
header_cycles=1
responder_set=false
width=64
default=system.membus.responder.pio
port=system.bridge.side_b system.physmem.port[0] system.l2.mem_side
system.iocache.mem_side
[system.membus.responder]
type=IsaFake
pio_addr=0
pio_latency=1
pio_size=8
platform=system.tsunami
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.membus.default
[system.physmem]
type=DRAMsim
biu_delay=10
biu_depth=64
biu_selection_policy=FCFS
channel_count=0
channel_width=0
debug_all=false
debug_amb=false
debug_biu=false
debug_bundle=false
debug_cas=false
debug_dram=false
debug_threshold=0
debug_transaction=false
debug_wave=false
dramtype=
file=
frequency=0
latency=30000
latency_var=0
null=false
power_file=
range=0:134217727
spd_file=src/mem/dramsim/mem_system_def/SDRAM-133-3-3-3.spd
strict_ordering=false
transaction_granularity=64
watch_refresh_trans=0
watch_trans=0
zero=false
port=system.membus.port[1]
[system.simple_disk]
type=SimpleDisk
children=disk
disk=system.simple_disk.disk
system=system
[system.simple_disk.disk]
type=RawDiskImage
image_file=/home/m5-fs/disks/linux-parsec-golden.img
read_only=true
[system.terminal]
type=Terminal
intr_control=system.intrctrl
number=0
output=true
port=3456
[system.tol2bus]
type=Bus
children=responder
SCS_BusType=1
block_size=64
bus_id=0
clock=2500
header_cycles=1
responder_set=false
width=16
default=system.tol2bus.responder.pio
port=system.l2.cpu_side system.cpu0.icache.mem_side
system.cpu0.dcache.mem_side system.cpu1.icache.mem_side
system.cpu1.dcache.mem_side system.cpu2.icache.mem_side
system.cpu2.dcache.mem_side system.cpu3.icache.mem_side
system.cpu3.dcache.mem_side
[system.tol2bus.responder]
type=IsaFake
pio_addr=0
pio_latency=1
pio_size=8
platform=system.tsunami
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.tol2bus.default
[system.tsunami]
type=Tsunami
children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1
fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2
fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6
fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1
fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
intrctrl=system.intrctrl
system=system
[system.tsunami.backdoor]
type=AlphaBackdoor
cpu=system.cpu0
disk=system.simple_disk
pio_addr=8804682956800
pio_latency=1000
platform=system.tsunami
system=system
terminal=system.terminal
pio=system.iobus.port[25]
[system.tsunami.cchip]
type=TsunamiCChip
pio_addr=8803072344064
pio_latency=1000
platform=system.tsunami
system=system
tsunami=system.tsunami
pio=system.iobus.port[1]
[system.tsunami.ethernet]
type=NSGigE
BAR0=1
BAR0Size=256
BAR1=0
BAR1Size=4096
BAR2=0
BAR2Size=0
BAR3=0
BAR3Size=0
BAR4=0
BAR4Size=0
BAR5=0
BAR5Size=0
BIST=0
CacheLineSize=0
CardbusCIS=0
ClassCode=2
Command=0
DeviceID=34
ExpansionROM=0
HeaderType=0
InterruptLine=30
InterruptPin=1
LatencyTimer=0
MaximumLatency=52
MinimumGrant=176
ProgIF=0
Revision=0
Status=656
SubClassCode=0
SubsystemID=0
SubsystemVendorID=0
VendorID=4107
clock=0
config_latency=20000
dma_data_free=false
dma_desc_free=false
dma_no_allocate=true
dma_read_delay=0
dma_read_factor=0
dma_write_delay=0
dma_write_factor=0
hardware_address=00:90:00:00:00:01
intr_delay=10000000
max_backoff_delay=10000000
min_backoff_delay=4000
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=1000
platform=system.tsunami
rss=false
rx_delay=1000000
rx_fifo_size=524288
rx_filter=true
rx_thread=false
system=system
tx_delay=1000000
tx_fifo_size=524288
tx_thread=false
config=system.iobus.port[29]
dma=system.iobus.port[30]
pio=system.iobus.port[27]
[system.tsunami.fake_OROM]
type=IsaFake
pio_addr=8796093677568
pio_latency=1000
pio_size=393216
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[9]
[system.tsunami.fake_ata0]
type=IsaFake
pio_addr=8804615848432
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[20]
[system.tsunami.fake_ata1]
type=IsaFake
pio_addr=8804615848304
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[21]
[system.tsunami.fake_pnp_addr]
type=IsaFake
pio_addr=8804615848569
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[10]
[system.tsunami.fake_pnp_read0]
type=IsaFake
pio_addr=8804615848451
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[12]
[system.tsunami.fake_pnp_read1]
type=IsaFake
pio_addr=8804615848515
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[13]
[system.tsunami.fake_pnp_read2]
type=IsaFake
pio_addr=8804615848579
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[14]
[system.tsunami.fake_pnp_read3]
type=IsaFake
pio_addr=8804615848643
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[15]
[system.tsunami.fake_pnp_read4]
type=IsaFake
pio_addr=8804615848707
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[16]
[system.tsunami.fake_pnp_read5]
type=IsaFake
pio_addr=8804615848771
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[17]
[system.tsunami.fake_pnp_read6]
type=IsaFake
pio_addr=8804615848835
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[18]
[system.tsunami.fake_pnp_read7]
type=IsaFake
pio_addr=8804615848899
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[19]
[system.tsunami.fake_pnp_write]
type=IsaFake
pio_addr=8804615850617
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[11]
[system.tsunami.fake_ppc]
type=IsaFake
pio_addr=8804615848891
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[8]
[system.tsunami.fake_sm_chip]
type=IsaFake
pio_addr=8804615848816
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[3]
[system.tsunami.fake_uart1]
type=IsaFake
pio_addr=8804615848696
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[4]
[system.tsunami.fake_uart2]
type=IsaFake
pio_addr=8804615848936
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[5]
[system.tsunami.fake_uart3]
type=IsaFake
pio_addr=8804615848680
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[6]
[system.tsunami.fake_uart4]
type=IsaFake
pio_addr=8804615848944
pio_latency=1000
pio_size=8
platform=system.tsunami
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[7]
[system.tsunami.fb]
type=BadDevice
devicename=FrameBuffer
pio_addr=8804615848912
pio_latency=1000
platform=system.tsunami
system=system
pio=system.iobus.port[22]
[system.tsunami.ide]
type=IdeController
BAR0=1
BAR0Size=8
BAR1=1
BAR1Size=4
BAR2=1
BAR2Size=8
BAR3=1
BAR3Size=4
BAR4=1
BAR4Size=16
BAR5=1
BAR5Size=0
BIST=0
CacheLineSize=0
CardbusCIS=0
ClassCode=1
Command=0
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
MaximumLatency=0
MinimumGrant=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
config_latency=20000
disks=system.disk0 system.disk2
max_backoff_delay=10000000
min_backoff_delay=4000
pci_bus=0
pci_dev=0
pci_func=0
pio_latency=1000
platform=system.tsunami
system=system
config=system.iobus.port[31]
dma=system.iobus.port[32]
pio=system.iobus.port[26]
[system.tsunami.io]
type=TsunamiIO
frequency=976562500
pio_addr=8804615847936
pio_latency=1000
platform=system.tsunami
system=system
time=Thu Jan 1 00:00:00 2009
tsunami=system.tsunami
year_is_bcd=false
pio=system.iobus.port[23]
[system.tsunami.pchip]
type=TsunamiPChip
pio_addr=8802535473152
pio_latency=1000
platform=system.tsunami
system=system
tsunami=system.tsunami
pio=system.iobus.port[2]
[system.tsunami.pciconfig]
type=PciConfigAll
bus=0
pio_latency=1
platform=system.tsunami
size=16777216
system=system
pio=system.iobus.default
[system.tsunami.uart]
type=Uart8250
pio_addr=8804615848952
pio_latency=1000
platform=system.tsunami
system=system
terminal=system.terminal
pio=system.iobus.port[24]
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
