Hi, I am wondering is there any information available about what is the default configuration between L3, L2, and L1? For example, by default does each core have 1 L1 and 1 L2 and all L2 share the same L3? If this is not the default configuration, how do I modify that? Thanks, Steve
_______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
