Hi,
Under the Cache<TagStore>::access function in cache_impl.hh, I see the
following lines dealing with writebacks:
if (pkt->cmd == MemCmd::Writeback) {
        assert(blkSize == pkt->getSize());
      ....
}

If I am understanding it correctly, blkSize is the size of a line in the
cache while pkt->getSize() stores the size of the a line in the higher cache
that is doing a write back to the lower cache. This contradicts the assert
statement, which essentially says that the line size of the lower cache has
to be equal to the line size of the higher cache. Can anyone tell me where
my understanding is wrong?
Thanks!
Steve
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

Reply via email to