Thanks Stephen.  I went ahead and changed the library:
USE ieee.std_logic_arith.ALL;

to:
USE IEEE.Numeric_STD;

in both the original and the test and that seemed to allow everything to be 
anylized smoothly. 

Now I have  a new problem at the testbench.  For my for loops (toward the 
bottom) i have:

        FOR j IN 0 TO 255 LOOP
          Number1 <= conv_std_logic_vector(j, 8);
          Even1 <= '0';
          WAIT FOR 10 ns;
        END LOOP;  -- j
       FOR j IN 0 TO 255 LOOP
          Number1 <= conv_std_logic_vector(j, 8);
          Even1 <= '1';
          WAIT FOR 10 ns;
        END LOOP;  -- j

GHDL doesnt seem to like my conv_std_logic_vector and spits out that there is 
"no declaration" for it.  I think this goes back to when you said that 
IEEE.Numeric_STD differs somewhat from std_logic_unsigned but provides the same 
functionality.  Is there an equivilant for the syntax 'conv_std_logic_vector'  
or do I have to use a different library alltogether?

Oh, also, I tried implementing Synopsis.std_logic_unsigned in its place but it 
seems that I get a no declaration error for that as well.  Im guessing GHDL 
doesn't come with the synopsis libraries?

Thanks.

_______________________________________________
Ghdl-discuss mailing list
[email protected]
https://mail.gna.org/listinfo/ghdl-discuss

Reply via email to