G'day Mark, I get a similar message as a warning when compiling the Altera libs. However they do compile and sim fine. Here's the command and a sample of the output I use to build the altera lib:
ghdl -a --std=93c --ieee=synopsys -fexplicit --work=lpm ../altera/220pack.vhd ../altera/220model.vhd ../altera/220model.vhd:2018:45:warning: universal integer bound must be numeric literal or attribute ../altera/220model.vhd:2392:45:warning: universal integer bound must be numeric literal or attribute ../altera/220model.vhd:2755:45:warning: universal integer bound must be numeric literal or attribute ../altera/220model.vhd:3175:45:warning: universal integer bound must be numeric literal or attribute ../altera/220model.vhd:3740:43:warning: universal integer bound must be numeric literal or attribute I'm using GHDL 0.25 on windows. Regards Phil -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Mark van Doesburg Sent: Tuesday, 17 October 2006 6:10 PM To: [email protected] Subject: [Ghdl-discuss] universal integer bound must be numeric literal orattribute I get the error message: "../vhdl_source/test_generic.vhd:22:26: universal integer bound must be numeric literal or attribute", when trying to compile the following code. --------------- library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity test_generic is generic ( width: natural; awidth: natural ); port( clk: in std_logic; reset: in std_logic; we: in std_logic; din: in std_logic_vector(width-1 downto 0); dout: out std_logic_vector(width-1 downto 0); addr: in std_logic_vector(awidth-1 downto 0) ); end; architecture test of test_generic is type mem_type is array(0 to 2**awidth-1) of std_logic_vector(width-1 downto 0); signal memory: mem_type; begin process(clk) begin if rising_edge(clk) then if we='1' then memory(to_integer(unsigned(addr)))<=din; end if; dout<=memory(to_integer(unsigned(addr))); end if; end process; end; --------------- I can get this construction to work if I add a constant with a value of 2**awidth-1. Unfortunately this construction is in the altera_mf library which I would prefer not to change. regards, Mark van Doesburg _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
