On Dec 5, 2011, at 11:01 AM, Svenn Are Bjerkem wrote:

> Ok, It could have been something wrong with my code or some feature
> not implemented which caused the observation. Taken that it needs
> further investigation, I will take the effort to create a gna user and
> report the incident in a more appropriate way.

Troubleshooting something for the non-ghdl author means literally hours of VHDL 
'lawyering' to understand precisely what is supposed to happen followed by 
analysis of Ada source in ghdl to determine compliance.  Supplying more 
information can tell us where to look and save lots of time.  I'd  be willing 
to bet you could write something with generate statements that works simply by 
minimizing the number of types and subtypes involved (I'm suspicious of a class 
of problems with ghdl).  In general if your design works in Modelsim, there's a 
high likelihood it should work in ghdl.  

There don't appear to be any applicable standard changes that would imply 
different functionality in Modelsim compliant to a newer VHDL LRM standard  
(and ghdl is mostly VHDL-93 compliant with several features from 02 and 08). 
Reading a little further the version of  Modelsim supporting 64 bit values 
(other than Time) might be limited.

Without more information it sounds like a bug, but I can neither confirm nor 
deny.  You can post something that demonstrates the problem here instead of 
getting a Gna account.

Knowing the values you can demonstrate the problem with, types and sub type 
declarations are the important thing.  

It could even be a problem with mapping reals to ghw. Which reminds me, you 
could try assertion or report statements and use the predefined attribute 
'IMAGE to output values to separate gtkwave related issues.  

If the integer values work but not reals than it's in type conversion for 
reals, and likely caused by ghdl fumbling types or subtypes (there'd be a bug 
lurking in there).

It could even be an instrumentation problem.


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