Thanks for the response Andrey Gursky. 

I use VHDL 2000. Im having errors in a lot of ports. For example: 

 signal in_0 : std_logic; 
 signal out_0 : std_logic';

 signal out_1 : std_logic';

 IP0: ip0 port map (
 input => in_0 & in_0, -- ERROR
 output => out_0
 );

 IP1: ip1 port map (
 input => out_0 and out_0, -- ERROR
 output => out_1
 ); 

I can´t put expression in ports. Is there any way you could do it? I
have a really big design and is very tedious change everything.
I want to use GHDL with VUNIT, so I would not change compiler. 

CARLOS ALBERTO RUIZ NARANJO
_FPGA engineer_
 cr...@dasphotonics.com 

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Acceso K, Edificio 8F, 2ª planta 46022 Valencia - SPAIN
Telf: +34 963 556 150 - Directo: +34 -------------- 

www.dasphotonics.com [3] 

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On 25-10-2016 14:59, Andrey Gursky wrote: 

> Hi,
> 
> On Tue, 25 Oct 2016 14:19:49 +0200
> Carlos Alberto Ruiz <cr...@dasphotonics.com> wrote:
> 
>> Hello, 
>> 
>> I have this error to compile: 
>> 
>> /home/cruiz/ELINT/95512010_FPGA_central/src/tosca2/tosca2_ifc_suser_elint_agsw.vhd:2078:58:
>> actual expression must be globally static 
>> 
>> In this line: 
>> 
>> port map(id_ch1 => i_fmc1(0,7) & i_fmc1(0,6) & i_fmc1(0,5) &
>> i_fmc1(0,4)
>> & i_fmc1(0,3) & i_fmc1(0,2) & i_fmc1(0,1) & i_fmc1(0,0), 
>> 
>> I have the same problem in Xilins, but its only a waring.
> 
> Are you sure, the expression is indeed globally static?
> 
> From my experience [1], Xilinx warns you about violating the VHDL
> standard (by the way, what version do you use?), though such standard's
> constraints are really artificial and have been overcome many years ago
> by proprietary vendors such as Xilinx and Altera, but unfortunately not
> GHDL. At least the issue I've encountered could be easy fixed in
> another VHDL simulator [2].
> 
> Regards,
> Andrey
> 
> [1] relax "choice must be locally static expression"
> https://sourceforge.net/p/ghdl-updates/tickets/40/ [1]
> 
> [2] VHDL compiler and simulator
> https://github.com/nickg/nvc [2]
 

Links:
------
[1] https://sourceforge.net/p/ghdl-updates/tickets/40/
[2] https://github.com/nickg/nvc
[3] http://www.dasphotonics.com/
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