#3557: CPU Vector instructions in GHC.Prim
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    Reporter:  guest             |        Owner:  vivian      
        Type:  feature request   |       Status:  new         
    Priority:  normal            |    Milestone:  _|_         
   Component:  Compiler (NCG)    |      Version:  6.11        
    Keywords:                    |     Testcase:              
   Blockedby:                    |   Difficulty:  Unknown     
          Os:  Unknown/Multiple  |     Blocking:              
Architecture:  Unknown/Multiple  |      Failure:  None/Unknown
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Comment(by vivian):

 Replying to [comment:26 guest]:
 > Replying to [comment:25 rl]:
 > > FWIW, I don't think those reasons are entirely correct. I would
 suggest moving the page back. Vector instructions ''are'' SIMD
 instuctions. Vector computing is, to me, something fairly different. The
 relevant Wikipedia pages have a lot of information which might help clear
 up the confusion.
 >
 > I do not know what Wikipedia pages are relevant for you, but I think
 > http://en.wikipedia.org/wiki/Vector_processor
 > supports the view, that SSE and AltiVec are about vector computing (or
 vector processing) not about parallel/SIMD computing. The same applies to
 the Blog article that compares Larrabee with NVidia GPUs.
 > I do not see a reason to throw together two different approaches. Do we
 disagree on the naming or on the statement, that there are two different
 approaches to tackle repetitive computations?

 There are three terms here: (i) parallel, (ii) SIMD, (iii) vector
 processing.

 You seem to be equating SIMD with parallel as opposed to vector
 processing.  This, I think, is an error.  Consider a Beowulf cluster,
 which is a parallel machine that uses MPI.  This cluster can execute
 parallel algorithms where each node has its own instructions and data
 '''Multiple Instruction Multiple Data (MIMD)'''.

 A different sort of parallelism occurs when the same instruction is
 performed on different data units at the same time '''Single Instruction
 Multiple Data (SIMD)'''.   In this sense SIMD '''is''' vector processing
 and SIMD is the standard name for it.

 By the way, SSE stands for 'Streaming SIMD Extension'.

 Whether the computations are performed on the CPU or a GPU, if the same
 instruction (or kernel) is applied to multiple data units in parallel,
 this is SIMD.

 Also, Manuel Chakravarty has written the
 [http://hackage.haskell.org/packages/Accelerate Accelerate] package for
 using the NVidia GPU from Haskell.

 Anyway, this feature request is about adding CPU Vector instructions,
 i.e., SSE, or '''Streaming SIMD Extension'''s.

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/3557#comment:27>
GHC <http://www.haskell.org/ghc/>
The Glasgow Haskell Compiler
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