On 2016-12-01 18:15:54 -0700, Nelson H. F. Beebe wrote: > Vincent clarifies about my response on about zero shift counts: > > >> ... > >> I'm not talking about a zero shift count, but a shift of the value 0 > >> with an arbitrary shift count, e.g. (uint64_t) 0 << 64. This is > >> undefined behavior, but I wonder why. When mapped to a hardware > >> instruction, does the result depend on the platform? > >> ... > > It isn't the issue of a zero value being shifted, but rather, the > range of allowable shift values.
Yes, but *why* also for zero? > The ISO 1999 C Standard's relevent restriction is: > > >> ... > >> If the value of the right operand is negative or is greater than or > ^^^^^^^^^^^^^^ > >> equal to the width of the promoted left operand, the behavior is > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > >> undefined. > >> ... > > That is, with an n-bit word, shift counts from 0 to n - 1 are legal, > but negative shift counts, and counts of n or larger, are undefined > behavior. > > The reason is that hardware implementations do different things: I agree for nonzero values, but I repeat: What about 0? With your examples, 0 shifted by an arbitrary shift count always gives 0. So, I don't see any valid reason why the C standard chose to make this undefined behavior in the particular case of 0. This makes code like: n = number of leading 0's of u; v = u << n; undefined for u = 0. -- Vincent Lefèvre <vinc...@vinc17.net> - Web: <https://www.vinc17.net/> 100% accessible validated (X)HTML - Blog: <https://www.vinc17.net/blog/> Work: CR INRIA - computer arithmetic / AriC project (LIP, ENS-Lyon) _______________________________________________ gmp-devel mailing list gmp-devel@gmplib.org https://gmplib.org/mailman/listinfo/gmp-devel
