I wrote:
Bernhard Kohl wrote:
Hi,
This seems to be necessary for some types of PCI devices. We got problems
when using gPXE in KVM virtual machines with direct PCI device access.
The PCI spec says:
Decode (I/O or memory) of a register is disabled via the command
register before
sizing a Base Address register. Software saves the original value of the
Base
Address register, writes 0FFFFFFFFh to the register, then reads it back.
...
The original value in the Base Address register is restored before
reenabling
decode in the command register of the device.
Thanks, Bernhard. This has been noted at
http://support.etherboot.org/index.php?do=details&task_id=40
Bernhard, I notice that we might actually wish to disable memory space
access... I've made a modified patch, attached. Could you please test
it out? Also available at:
http://git.etherboot.org/?p=people/sha0/gpxe.git;a=commitdiff;h=86761eafd7451b084ca67c3b10852e50a85f9ee1
Thanks again!
- Shao Miller
From 86761eafd7451b084ca67c3b10852e50a85f9ee1 Mon Sep 17 00:00:00 2001
From: Bernhard Kohl <[email protected]>
Date: Wed, 20 Jan 2010 23:06:39 -0500
Subject: [PATCH] [pci] Disable memory access & restore BAR and command register
This seems to be necessary for some types of PCI devices. We got
problems when using gPXE in KVM virtual machines with direct
PCI device access.
The PCI spec says:
Decode (I/O or memory) of a register is disabled via the command
register before
sizing a Base Address register. Software saves the original value of the
Base
Address register, writes 0FFFFFFFFh to the register, then reads it back.
...
The original value in the Base Address register is restored before
reenabling decode in the command register of the device.
Signed-off-by: Bernhard Kohl <[email protected]>
Modified-by: Shao Miller <[email protected]>
Signed-off-by: Shao Miller <[email protected]>
---
src/drivers/bus/pciextra.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/src/drivers/bus/pciextra.c b/src/drivers/bus/pciextra.c
index 1dd63ee..ecc7232 100644
--- a/src/drivers/bus/pciextra.c
+++ b/src/drivers/bus/pciextra.c
@@ -60,15 +60,22 @@ int pci_find_capability ( struct pci_device *pci, int cap )
{
* function.
*/
unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ) {
+ uint16_t cmd;
uint32_t start, size;
+ /* Save the original command register */
+ pci_read_config_word ( pci, PCI_COMMAND, &cmd );
/* Save the original bar */
pci_read_config_dword ( pci, reg, &start );
+ /* Disable memory space access */
+ pci_write_config_word ( pci, PCI_COMMAND, cmd & ~PCI_COMMAND_MEM );
/* Compute which bits can be set */
pci_write_config_dword ( pci, reg, ~0 );
pci_read_config_dword ( pci, reg, &size );
/* Restore the original size */
pci_write_config_dword ( pci, reg, start );
+ /* Restore the original command register. This reenables decoding. */
+ pci_write_config_word ( pci, PCI_COMMAND, cmd );
/* Find the significant bits */
if ( start & PCI_BASE_ADDRESS_SPACE_IO ) {
size &= PCI_BASE_ADDRESS_IO_MASK;
--
1.5.3.4
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