Bernhard Kohl wrote:
Hi,
This seems to be necessary for some types of PCI devices. We got problems
when using gPXE in KVM virtual machines with direct PCI device access.
The PCI spec says:
Decode (I/O or memory) of a register is disabled via the command
register before
sizing a Base Address register. Software saves the original value of the
Base
Address register, writes 0FFFFFFFFh to the register, then reads it back.
...
The original value in the Base Address register is restored before
reenabling
decode in the command register of the device.
Thanks, Bernhard. This has been noted at
http://support.etherboot.org/index.php?do=details&task_id=40
- Shao Miller
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