The slot design was useful for only one thing--getting the cache closer to the CPU core so a faster bus could be use. Once cache was integrated into the die, the need for slots were out.

Tidbit: The Pentium Pro actually had an integrated L2 cache (well, the cpu and cache were in the same package) and used socket 8. It was released some two years before any Slot-1 Pentium II was shipped.



True. However, the size of the die was too large to make it economical for anything but server usage. (die size = $$$) Plus, the Pentium Pro's cache, as you state, was not integrated into the core so much as it was slapped into the die package. Therefore, it couldn't achieve the same benefits of a huge bus width and low latency that true integrated cache (first on the Celeron A of all things...) brought.

Greg

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