Hello Mark,
On Friday 16 March 2012 00:03:21 Mark Cave-Ayland wrote:
> Please find attached the latest version of my patch which seems to have
> the same behaviour as git master, except that it now also boots HelenOS.
> This is based upon the PowerISA reference link you pointed me towards.
> I've also clarified the comments to make it clearer where the masks have
> been calculated from, plus modified it so (I hope) it will also work on
> PPC64.
>
> Any feedback/review/testing greatly appreciated.
Using (a slightly modified version of) your qemu-ppc-v3.patch:
-+ new_msr = env->msr & ~0xed36ULL & ~((target_ulong)1 << MSR_HVB);
++ new_msr = env->msr & ~0xed36ULL & ~((target_ulong) MSR_HVB);
And using a patch to HelenOS, I'm able to run HelenOS mainline without a
change to OpenBIOS on ppc32. I see the clock issue Jakub mentioned, but
otherwise I can use the HelenOS user space graphical console normally.
Attached both patches.
Regards,
Martin Sucha
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index bd711b6..69275d8 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2478,11 +2478,15 @@ static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx
" => %08x (%02x)\n", env->nip, excp, env->error_code);
- /* new srr1 value excluding must-be-zero bits */
+ /* new srr1 value with interrupt-specific bits defaulting to zero */
msr = env->msr & ~0x783f0000ULL;
- /* new interrupt handler msr */
- new_msr = env->msr & ((target_ulong)1 << MSR_ME);
+ /* new interrupt handler msr (as per PowerISA 2.06B p.811 and p.814):
+ 1) force the following bits to zero
+ IR, DR, FE0, FE1, EE, BE, FP, PMM, PR, SE
+ 2) default the following bits to zero (can be overidden later on)
+ RI, HVB (note HVB is a different bit between PPC32/64) */
+ new_msr = env->msr & ~0xed36ULL & ~((target_ulong) MSR_HVB);
/* target registers */
srr0 = SPR_SRR0;
@@ -2960,7 +2964,7 @@ static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
if (asrr1 != -1)
env->spr[asrr1] = env->spr[srr1];
/* If we disactivated any translation, flush TLBs */
- if (new_msr & ((1 << MSR_IR) | (1 << MSR_DR)))
+ if (msr & ((1 << MSR_IR) | (1 << MSR_DR)))
tlb_flush(env, 1);
if (msr_ile) {
=== modified file 'kernel/arch/ppc32/src/ppc32.c'
--- kernel/arch/ppc32/src/ppc32.c 2012-03-02 15:12:01 +0000
+++ kernel/arch/ppc32/src/ppc32.c 2012-03-17 17:10:02 +0000
@@ -129,6 +129,7 @@
case 8:
visual = VISUAL_INDIRECT_8;
break;
+ case 15:
case 16:
visual = VISUAL_RGB_5_5_5_BE;
break;
_______________________________________________
HelenOS-devel mailing list
[email protected]
http://lists.modry.cz/cgi-bin/listinfo/helenos-devel
