On Thu, Apr 5, 2012 at 9:11 AM, Jakub Jermar <[email protected]> wrote:
> On 5.4.2012 14:54, Jiri Svoboda wrote:
>>> Moreover, all accesses to the structure must be done using the
>>> pio_read/write_n() functions so the proper access width is
>>> guaranteed.
>> Yes but at least on some arches these functions are written in C and
>> they're inline. GCC will propagate the information about the packed
>> nature of the structure all the way to the core of the function (no,
>> really!) and generate a non-atomic access. Believe me, I found out
>> the hard way (on ARM when porting to the FreeRunner).
>
> Well, I do remember the annecdote with FreeRunner, but then, have you
> used ioportN_t as domain types for the register struct members? Looking
> on e.g. the FreeRunner UART registers from the Camp of 2010 suggests the
> opposite, but I might be still missing something.
>
> I would like to test this on a simple example. I also remember when
> using volatile in case of programming the APIC prevented the compiler
> from turning accesses to 32-bit IO registers into a series of 8-bit
> accesses.

I have seen this on on beagleboard too, had to remove packed attribute
from some USB register structs. we are not the only ones in this situation:
http://gcc.gnu.org/ml/gcc/2011-02/msg00035.html

jan


>
> Anyway, I am going to make myself a small SPARC sample and see...
>
> Jakub
>
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