On Wednesday 04 February 2015, Felix Salfelder wrote:
> [from german:
>  i'd like to instanciate a Verilog-A module as a SPICE
> subckt, using the letter X. is this possible?
> ]
> 
> Hi there.
> 
> this is a valid question. spectre allows something like
> 
> .ahdl_include something.va
> Xmysomething a b c something width=19.

A variant of load with compile will do that eventually.  I have 
been looking at code in gnucap-uf as a start.

> gnucap-adms does not provide subckt style instanciable
> components. maybe it could, i think spice is obsolete
> enough, so i did not bother. for now, use the verilog style
> netlister. also, there is a hack that might make
> .something mys a b c width=19
> work in spice mode. haven't tried for a while.

That works.

What I need to do with the spice input is to redefine the unused 
letters as generic devices, like the verilog and spectre inputs 
do now, and then to unuse certain letters like D, M, Q, X.

That will solve this problem, and also another problem of 
conflicting plugins that use the same letter.

But really, moving on to Verilog format netlists is a better 
way.

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