%% Regarding Re: Considering target file `Makefile'.; you wrote:
ms> That sort of helps, but I'm not sure it gets me all the way to a
ms> solution. Perhaps more specific information would be helpful.
ms> We use a common included file called Makedefs.gm. It's included in most
ms> of our Makefiles at the top. It would be really nice to be able to say
ms> in Makedefs.gm:
ms> Makedefs.gm:;
ms> Makefile:;
ms> and have all of our Makefiles then have the information gmake
ms> needs to just skip over the implicit rule searches for those files
ms> (there are others as well).
Sounds good.
ms> Unfortunatly, this then means that Makedefs.gm can't be included
ms> at the top of the Makefile since these explicit rules then take
ms> the place of the first and default rule which is done when make is
ms> invoked without a target on the command-line instead of the usual
ms> "all" target (which is currently first).
Why can't you just say:
all:
Makedefs.gm:;
Makefile:;
in Makedefs.gm?
I always put an empty "all:" target as one of the very first things in
my global makefile so that, even if I make a mistake and declare a rule
somewhere else, "all:" will be the default.
ms> Can Makedefs.gm (and other included files) add itself to MAKEFILES
ms> and avoid this issue (since the info page says that the default
ms> rule won't be taken from a file in MAKEFILES)? I can't seem to
ms> make this work, but maybe I'm doing it wrong. It seems like it
ms> would be nice if the default rule wouldn't be taken from an
ms> "included" Makefile either.
Often people want to have the default rule in an included file.
Many makefiles I write look something like this, after all:
include global.mk
LIBNM = libfoo.a
LIBSRCS = foo.c bar.c baz.c
Done.
ms> Putting this in Makedefs.gm doesn't seem to do what I was hoping it
ms> would do:
ms> MAKEFILES += Makedefs.gm
This can't work; MAKEFILES is used by make to figure out what makefiles
to read before it reads the "normal" makefile.
You're putting this command _into_ the "normal" makefile. Oops!
You have to set MAKEFILES as an environment variable (or on the command
line) before you invoke make. Once make is running, MAKEFILES is
useless (well, if you export it then submakes will use it of course).
ms> Along this same line - is there a way to get gmake to skip the
ms> implicit rule search for files that look like -lfoo in the
ms> dependencies and go straight to the magic library dependency code?
No. Make always tries to build a dependency using all normal methods
first.
Of course, you always have the source code :).
ms> I don't think that having explicit and empty rules is what I'd
ms> want for that.
Definitely not: if make finds a rule for these it'll never get to the
"magic library dependency code" at all!
ms> BTW, if this all seems pointless and anal...I'm just trying to
ms> squeeze out more speed because we do lots of compiles per day on
ms> NFS mounted disk on a Sequent/ptx machine where the NFS
ms> implimentation is horrible. Skipping the large numbers of stat()
ms> calls would be nice.
Well, if you haven't done so already then of course you should
_definitely_ invoke make with the -r option to clean out all the default
implicit rules and then put back only those that you need in your global
makefile. That can save a _LOT_ of effort, as most builds don't need
Fortran, RCS/SCCS, etc. implicit rules!
You can use "make -pqf/dev/null" to get a listing of all the default
implicit rules.
--
-------------------------------------------------------------------------------
Paul D. Smith <[EMAIL PROTECTED]> Find some GNU make tips at:
http://www.gnu.org http://www.ultranet.com/~pauld/gmake/
"Please remain calm...I may be mad, but I am a professional." --Mad Scientist
