Hi, i have set up a small example project that has a problem that i don't understand:
all: final.elf
final.elf: $(OBJ) $(DEP)
$(LD) -o $@ $(OBJ)
$(OBJ): obj/%.o : %.c
$(CC) -o $@ -c $<
obj: $(OBJ)
show:
@echo "OBJ"
@echo $(OBJ)
[...]
A simple "make" does try to link "final.elf", but the
object files are not made.
BUT: When i do "make obj", the objects are made.
A "make show" shows up the correct object files.
I also work with automatic dependencies in this project,
maybe it is related to that.
The dependencies are generated automatically and are included.
[EMAIL PROTECTED]:~/p/make/example.stripped/dep> cat *
file.o file.d : \
src/file/SRC/file.c
gui.o gui.d : \
src/gui/SRC/gui.c
net.o net.d : \
src/net/SRC/net.c
socks.o socks.d : \
src/net/SRC/socks.c
stat.o stat.d : \
src/file/SRC/stat.c
window.o window.d : \
src/gui/SRC/window.c
I don't understand why the object files are not made.
I attached the WHOLE example project to this mail to see
any details. Of course also the complete Makefile is in there.
Thanks for any hints,
Torsten.
example.tar.gz
Description: application/tgz
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