Hello List!
Is it possible to set dependencies in variables and then have GNU Make
expand these dependencies? For instance, let's say we have a project
that builds two binaries, foo and bar. Each of foo and bar have their
own dependencies as defined below:
BINARIES := foo bar
FOO_OBJECTS := foo_obj_1 foo_obj_2
BAR_OBJECTS := bar_obj_1 bar_obj_2
Now, how would one setup a generic Makefile such that for each target
defined in $(BINARIES) the dependencies $($<_OBJECTS) are added
automatically? Perhaps I'm being too ambitious and this isn't possible
at all?
I've read up on the .SECONDEXPANSION special rule but I don't think that
would allow for what I'm after.
Many thanks!
Miguel
_______________________________________________
Help-make mailing list
[email protected]
https://lists.gnu.org/mailman/listinfo/help-make
